From f1360d5830fc7695cd26214257c62f34b73070c8 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Wed, 25 May 2016 10:49:25 -0700 Subject: [PATCH] Enable VREX for AVX512 directives Enable VREX for AVX512 instructions with upper 16 vector registers. gas/ PR gas/20141 * testsuite/gas/i386/i386.exp: Run x86-64-pr20141. * testsuite/gas/i386/x86-64-pr20141.d: New file. * testsuite/gas/i386/x86-64-pr20141.s: Likewise. opcodes/ PR gas/20141 * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS, CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS. * i386-init.h: Regenerated. --- gas/ChangeLog | 7 +++++++ gas/testsuite/gas/i386/i386.exp | 1 + gas/testsuite/gas/i386/x86-64-pr20141.d | 10 ++++++++++ gas/testsuite/gas/i386/x86-64-pr20141.s | 5 +++++ opcodes/ChangeLog | 7 +++++++ opcodes/i386-gen.c | 8 ++++---- opcodes/i386-init.h | 8 ++++---- 7 files changed, 38 insertions(+), 8 deletions(-) create mode 100644 gas/testsuite/gas/i386/x86-64-pr20141.d create mode 100644 gas/testsuite/gas/i386/x86-64-pr20141.s diff --git a/gas/ChangeLog b/gas/ChangeLog index 54afd16ebfb..2d23b4391ff 100644 --- a/gas/ChangeLog +++ b/gas/ChangeLog @@ -1,3 +1,10 @@ +2016-05-25 H.J. Lu + + PR gas/20141 + * testsuite/gas/i386/i386.exp: Run x86-64-pr20141. + * testsuite/gas/i386/x86-64-pr20141.d: New file. + * testsuite/gas/i386/x86-64-pr20141.s: Likewise. + 2016-05-25 H.J. Lu * config/tc-i386.c (arch_entry): Remove negated. diff --git a/gas/testsuite/gas/i386/i386.exp b/gas/testsuite/gas/i386/i386.exp index 716ec434542..1aca467267e 100644 --- a/gas/testsuite/gas/i386/i386.exp +++ b/gas/testsuite/gas/i386/i386.exp @@ -753,6 +753,7 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_64_check]] t run_dump_test "x86-64-rdpid-intel" run_dump_test "x86-64-fence-as-lock-add-yes" run_dump_test "x86-64-fence-as-lock-add-no" + run_dump_test "x86-64-pr20141" if { ![istarget "*-*-aix*"] && ![istarget "*-*-beos*"] diff --git a/gas/testsuite/gas/i386/x86-64-pr20141.d b/gas/testsuite/gas/i386/x86-64-pr20141.d new file mode 100644 index 00000000000..a8012b2c26c --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pr20141.d @@ -0,0 +1,10 @@ +#objdump: -dw + +.*: +file format .* + + +Disassembly of section .text: + +0+ <_start>: +[ ]*[a-f0-9]+: 62 e1 7d 48 e7 21 vmovntdq %zmm20,\(%rcx\) +#pass diff --git a/gas/testsuite/gas/i386/x86-64-pr20141.s b/gas/testsuite/gas/i386/x86-64-pr20141.s new file mode 100644 index 00000000000..f8fa3dfafb5 --- /dev/null +++ b/gas/testsuite/gas/i386/x86-64-pr20141.s @@ -0,0 +1,5 @@ + .text + .arch corei7 + .arch .avx512f +_start: + vmovntdq %zmm20, (%rcx) diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog index f13f299efb9..819c8ee3711 100644 --- a/opcodes/ChangeLog +++ b/opcodes/ChangeLog @@ -1,3 +1,10 @@ +2016-05-25 H.J. Lu + + PR gas/20141 + * i386-gen.c (cpu_flag_init): Add CpuVREX to CPU_AVX512F_FLAGS, + CPU_AVX512CD_FLAGS, CPU_AVX512ER_FLAGS and CPU_AVX512PF_FLAGS. + * i386-init.h: Regenerated. + 2016-05-25 H.J. Lu * i386-gen.c (cpu_flag_init): Rename CPU_ANY87_FLAGS to diff --git a/opcodes/i386-gen.c b/opcodes/i386-gen.c index 542ec6a920e..7a090e26091 100644 --- a/opcodes/i386-gen.c +++ b/opcodes/i386-gen.c @@ -200,13 +200,13 @@ static initializer cpu_flag_init[] = { "CPU_AVX2_FLAGS", "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2" }, { "CPU_AVX512F_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F" }, + "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F" }, { "CPU_AVX512CD_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD" }, + "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD" }, { "CPU_AVX512ER_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512ER" }, + "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512ER" }, { "CPU_AVX512PF_FLAGS", - "CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512PF" }, + "CpuVREX|CpuMMX|CpuSSE|CpuSSE2|CpuSSE3|CpuSSSE3|CpuSSE4_1|CpuSSE4_2|CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512PF" }, { "CPU_ANY_AVX_FLAGS", "CpuAVX|CpuAVX2|CpuAVX512F|CpuAVX512CD|CpuAVX512ER|CpuAVX512PF" }, { "CPU_L1OM_FLAGS", diff --git a/opcodes/i386-init.h b/opcodes/i386-init.h index f553d43a721..b023f983940 100644 --- a/opcodes/i386-init.h +++ b/opcodes/i386-init.h @@ -575,28 +575,28 @@ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_AVX512CD_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_AVX512ER_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 1, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_AVX512PF_FLAGS \ { { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1, 0, 0, 1, \ 0, 0, 0, 0, 1, 0, 0, 1, 1, 1, 1, 1, 0, 0, 1, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ - 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \ + 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, \ 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } } #define CPU_ANY_AVX_FLAGS \ -- 2.30.2