From f1388349e93e8e11dcf42dd32046d57948817c17 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 26 Mar 2020 13:05:49 +0000 Subject: [PATCH] Re: [libre-riscv-dev] cache SRAM organisation --- 33/3e6d00485c41913c1b18b86815e753c063e22d | 90 +++++++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 33/3e6d00485c41913c1b18b86815e753c063e22d diff --git a/33/3e6d00485c41913c1b18b86815e753c063e22d b/33/3e6d00485c41913c1b18b86815e753c063e22d new file mode 100644 index 0000000..8ceb451 --- /dev/null +++ b/33/3e6d00485c41913c1b18b86815e753c063e22d @@ -0,0 +1,90 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Thu, 26 Mar 2020 13:06:15 +0000 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-riscv.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jHSD9-0006bo-1a; Thu, 26 Mar 2020 13:06:15 +0000 +Received: from lkcl.net ([217.147.94.29]) + by libre-riscv.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128) + (Exim 4.89) (envelope-from ) id 1jHSD7-0006bi-8Z + for libre-riscv-dev@lists.libre-riscv.org; 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