From f149d86eec490947afa91fac9fc5406aa0ac6c8a Mon Sep 17 00:00:00 2001 From: bugzilla-daemon Date: Fri, 8 May 2020 14:37:52 +0000 Subject: [PATCH] [libre-riscv-dev] [Bug 304] Define minimum viable interface set for 180nm ASIC --- b7/597bff40e85acb13c70aec9de7f203a2a8e1cf | 75 +++++++++++++++++++++++ 1 file changed, 75 insertions(+) create mode 100644 b7/597bff40e85acb13c70aec9de7f203a2a8e1cf diff --git a/b7/597bff40e85acb13c70aec9de7f203a2a8e1cf b/b7/597bff40e85acb13c70aec9de7f203a2a8e1cf new file mode 100644 index 0000000..bb73486 --- /dev/null +++ b/b7/597bff40e85acb13c70aec9de7f203a2a8e1cf @@ -0,0 +1,75 @@ +Return-path: +Envelope-to: publicinbox@libre-riscv.org +Delivery-date: Fri, 08 May 2020 15:37:54 +0100 +Received: from localhost ([::1] helo=libre-riscv.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) + id 1jX48P-00067c-IZ; Fri, 08 May 2020 15:37:53 +0100 +Received: from localhost ([127.0.0.1] helo=bugs.libre-soc.org) + by libre-soc.org with esmtp (Exim 4.89) + (envelope-from ) id 1jX48O-00067U-6l + for libre-riscv-dev@lists.libre-riscv.org; Fri, 08 May 2020 15:37:52 +0100 +From: bugzilla-daemon@libre-soc.org +To: libre-riscv-dev@lists.libre-riscv.org +Date: Fri, 08 May 2020 14:37:52 +0000 +X-Bugzilla-Reason: CC +X-Bugzilla-Type: changed +X-Bugzilla-Watch-Reason: None +X-Bugzilla-Product: Libre-SOC's first SoC +X-Bugzilla-Component: Source Code +X-Bugzilla-Version: unspecified +X-Bugzilla-Keywords: +X-Bugzilla-Severity: enhancement +X-Bugzilla-Who: yimmanuel3@gatech.edu +X-Bugzilla-Status: CONFIRMED +X-Bugzilla-Resolution: +X-Bugzilla-Priority: --- +X-Bugzilla-Assigned-To: lkcl@lkcl.net +X-Bugzilla-Flags: +X-Bugzilla-Changed-Fields: bug_file_loc +Message-ID: +In-Reply-To: +References: +X-Bugzilla-URL: https://bugs.libre-soc.org/ +Auto-Submitted: auto-generated +MIME-Version: 1.0 +Subject: [libre-riscv-dev] [Bug 304] Define minimum viable interface set for + 180nm ASIC +X-BeenThere: libre-riscv-dev@lists.libre-riscv.org +X-Mailman-Version: 2.1.23 +Precedence: list +List-Id: Libre-RISCV General Development + +List-Unsubscribe: , + +List-Archive: +List-Post: +List-Help: +List-Subscribe: , + +Reply-To: Libre-RISCV General Development + +Content-Type: text/plain; charset="utf-8" +Content-Transfer-Encoding: base64 +Errors-To: libre-riscv-dev-bounces@lists.libre-riscv.org +Sender: "libre-riscv-dev" + +aHR0cHM6Ly9idWdzLmxpYnJlLXNvYy5vcmcvc2hvd19idWcuY2dpP2lkPTMwNAoKWWVob3dzaHVh +IDx5aW1tYW51ZWwzQGdhdGVjaC5lZHU+IGNoYW5nZWQ6CgogICAgICAgICAgIFdoYXQgICAgfFJl +bW92ZWQgICAgICAgICAgICAgICAgICAgICB8QWRkZWQKLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0t +LS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLS0tLQogICAg +ICAgICAgICAgICAgVVJMfGh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vciB8CiAgICAgICAgICAg +ICAgICAgICB8Zy9waXBlcm1haWwvbGlicmUtcmlzY3YtZGV2IHwKICAgICAgICAgICAgICAgICAg +IHwvMjAyMC1NYXkvMDA2Mzc0Lmh0bWwgICAgICAgfAoKLS0tIENvbW1lbnQgIzIgZnJvbSBZZWhv +d3NodWEgPHlpbW1hbnVlbDNAZ2F0ZWNoLmVkdT4gLS0tClJlbGV2YW50IExpbmtzOgoKaHR0cDov +L2xpc3RzLmxpYnJlLXJpc2N2Lm9yZy9waXBlcm1haWwvbGlicmUtcmlzY3YtZGV2LzIwMjAtTWF5 +LzAwNjM3NC5odG1sCmh0dHA6Ly9saXN0cy5saWJyZS1yaXNjdi5vcmcvcGlwZXJtYWlsL2xpYnJl +LXJpc2N2LWRldi8yMDIwLU1heS8wMDYzNzIuaHRtbApodHRwczovL2xpYnJlLXNvYy5vcmcvc2hh +a3RpL21fY2xhc3MvcGlub3V0cy8KaHR0cHM6Ly9naXRsYWIucmFwdG9yZW5naW5lZXJpbmcuY29t +L3JhcHRvci1lbmdpbmVlcmluZy1wdWJsaWMvbHBjLXNwaS1icmlkZ2UtZnBnYS90cmVlL21hc3Rl +cgoKLS0gCllvdSBhcmUgcmVjZWl2aW5nIHRoaXMgbWFpbCBiZWNhdXNlOgpZb3UgYXJlIG9uIHRo +ZSBDQyBsaXN0IGZvciB0aGUgYnVnLgpfX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f +X19fX19fX19fX19fXwpsaWJyZS1yaXNjdi1kZXYgbWFpbGluZyBsaXN0CmxpYnJlLXJpc2N2LWRl +dkBsaXN0cy5saWJyZS1yaXNjdi5vcmcKaHR0cDovL2xpc3RzLmxpYnJlLXJpc2N2Lm9yZy9tYWls +bWFuL2xpc3RpbmZvL2xpYnJlLXJpc2N2LWRldgo= + -- 2.30.2