From f1d4fadf1bdc399be515fc21bea3c2832e802f3e Mon Sep 17 00:00:00 2001 From: Eduardo Lima Mitev Date: Wed, 10 Jul 2019 09:48:21 +0200 Subject: [PATCH] nir: Add new texop nir_texop_tex_prefetch This is like nir_texop_tex, but signals that the sampling coordinates are immutable during the shader stage, in a way that allows the HW that supports pre-dispatching sampling operations to pre-fetch the result prior to scheduling the shader stage. This is introduced to support the feature in Freedreno. Adreno HW from a4xx supports it. A NIR pass introduced later in this series will detect sampling operations that are eligible for pre-dispatch, and replace nir_texop_tex by this new op, to tell the backend to enable pre-fetch. Signed-off-by: Rob Clark Reviewed-by: Kristian H. Kristensen --- src/compiler/nir/nir.h | 1 + src/compiler/nir/nir_print.c | 3 +++ src/compiler/spirv/spirv_to_nir.c | 2 ++ 3 files changed, 6 insertions(+) diff --git a/src/compiler/nir/nir.h b/src/compiler/nir/nir.h index 5c98aeefc66..43c904913d6 100644 --- a/src/compiler/nir/nir.h +++ b/src/compiler/nir/nir.h @@ -1736,6 +1736,7 @@ typedef enum { nir_texop_samples_identical, /**< Query whether all samples are definitely * identical. */ + nir_texop_tex_prefetch, /**< Regular texture look-up, eligible for pre-dispatch */ } nir_texop; typedef struct { diff --git a/src/compiler/nir/nir_print.c b/src/compiler/nir/nir_print.c index 496f9279676..8408fa2ba74 100644 --- a/src/compiler/nir/nir_print.c +++ b/src/compiler/nir/nir_print.c @@ -985,6 +985,9 @@ print_tex_instr(nir_tex_instr *instr, print_state *state) case nir_texop_samples_identical: fprintf(fp, "samples_identical "); break; + case nir_texop_tex_prefetch: + fprintf(fp, "tex (pre-dispatchable) "); + break; default: unreachable("Invalid texture operation"); break; diff --git a/src/compiler/spirv/spirv_to_nir.c b/src/compiler/spirv/spirv_to_nir.c index 4fb2edae88d..14b76785561 100644 --- a/src/compiler/spirv/spirv_to_nir.c +++ b/src/compiler/spirv/spirv_to_nir.c @@ -2110,6 +2110,8 @@ vtn_handle_texture(struct vtn_builder *b, SpvOp opcode, break; case nir_texop_txf_ms_mcs: vtn_fail("unexpected nir_texop_txf_ms_mcs"); + case nir_texop_tex_prefetch: + vtn_fail("unexpected nir_texop_tex_prefetch"); } unsigned idx = 4; -- 2.30.2