From f28bce00568a4f932bdef58d65ef34ea8f97ffe5 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Thu, 9 Jul 2020 01:07:24 +0100 Subject: [PATCH] identifying locations where big/little endian is in place, adding args --- src/soc/decoder/isa/caller.py | 6 ++++-- src/soc/decoder/power_decoder.py | 1 + src/soc/simulator/program.py | 28 ++++++++++++++-------------- src/soc/simulator/qemu.py | 8 ++++++++ src/soc/simulator/test_sim.py | 8 +++++--- 5 files changed, 32 insertions(+), 19 deletions(-) diff --git a/src/soc/decoder/isa/caller.py b/src/soc/decoder/isa/caller.py index e2e97edb..a2c2028d 100644 --- a/src/soc/decoder/isa/caller.py +++ b/src/soc/decoder/isa/caller.py @@ -245,8 +245,10 @@ class ISACaller: initial_mem=None, initial_msr=0, initial_insns=None, respect_pc=False, disassembly=None, - initial_pc=0): + initial_pc=0, + bigendian=True): + self.bigendian = bigendian self.halted = False self.respect_pc = respect_pc if initial_sprs is None: @@ -471,7 +473,7 @@ class ISACaller: print ("CIA NIA", self.respect_pc, self.pc.CIA.value, self.pc.NIA.value) yield self.dec2.dec.raw_opcode_in.eq(ins & 0xffffffff) - yield self.dec2.dec.bigendian.eq(0) # little / big? + yield self.dec2.dec.bigendian.eq(self.bigendian) def execute_one(self): """execute one instruction diff --git a/src/soc/decoder/power_decoder.py b/src/soc/decoder/power_decoder.py index 1be08267..b7d1bc15 100644 --- a/src/soc/decoder/power_decoder.py +++ b/src/soc/decoder/power_decoder.py @@ -343,6 +343,7 @@ class TopPowerDecoder(PowerDecoder): def elaborate(self, platform): m = PowerDecoder.elaborate(self, platform) comb = m.d.comb + # raw opcode in, byte-reverse it raw_be = self.raw_opcode_in l = [] for i in range(0, self.width, 8): diff --git a/src/soc/simulator/program.py b/src/soc/simulator/program.py index 19e30b3e..ad6ef970 100644 --- a/src/soc/simulator/program.py +++ b/src/soc/simulator/program.py @@ -13,19 +13,19 @@ import sys filedir = os.path.dirname(os.path.realpath(__file__)) memmap = os.path.join(filedir, "memmap") -bigendian = True -if bigendian: - endian_fmt = "elf64-big" - obj_fmt = "-be" - ld_fmt = "-EB" -else: - ld_fmt = "-EL" - endian_fmt = "elf64-little" - obj_fmt = "-le" - class Program: - def __init__(self, instructions): + def __init__(self, instructions, bigendian=True): + self.bigendian = bigendian + if self.bigendian: + self.endian_fmt = "elf64-big" + self.obj_fmt = "-be" + self.ld_fmt = "-EB" + else: + self.ld_fmt = "-EL" + self.endian_fmt = "elf64-little" + self.obj_fmt = "-le" + if isinstance(instructions, str): # filename self.binfile = open(instructions, "rb") self.assembly = '' # noo disassemble number fiiive @@ -47,7 +47,7 @@ class Program: self.binfile = tempfile.NamedTemporaryFile(suffix=".bin") args = ["powerpc64-linux-gnu-objcopy", "-O", "binary", - "-I", endian_fmt, + "-I", self.endian_fmt, elffile.name, self.binfile.name] subprocess.check_output(args) @@ -55,7 +55,7 @@ class Program: def _link(self, ofile): with tempfile.NamedTemporaryFile(suffix=".elf") as elffile: args = ["powerpc64-linux-gnu-ld", - ld_fmt, + self.ld_fmt, "-o", elffile.name, "-T", memmap, ofile.name] @@ -66,7 +66,7 @@ class Program: with tempfile.NamedTemporaryFile(suffix=".o") as outfile: args = ["powerpc64-linux-gnu-as", '-mpower9', - obj_fmt, + self.obj_fmt, "-o", outfile.name] p = subprocess.Popen(args, stdin=subprocess.PIPE) diff --git a/src/soc/simulator/qemu.py b/src/soc/simulator/qemu.py index 8b374873..83420aa5 100644 --- a/src/soc/simulator/qemu.py +++ b/src/soc/simulator/qemu.py @@ -22,6 +22,7 @@ class QemuController: stdout=subprocess.PIPE, stdin=subprocess.PIPE) self.gdb = GdbController(gdb_path='powerpc64-linux-gnu-gdb') + self.set_endian(bigendian) def __enter__(self): return self @@ -32,6 +33,13 @@ class QemuController: def connect(self): return self.gdb.write('-target-select remote localhost:1234') + def set_endian(self, bigendian): + if bigendian: + cmd = '-gdb-set endian big' + else: + cmd = '-gdb-set endian little' + return self.gdb.write(cmd) + def break_address(self, addr): cmd = '-break-insert *0x{:x}'.format(addr) return self.gdb.write(cmd) diff --git a/src/soc/simulator/test_sim.py b/src/soc/simulator/test_sim.py index 5d348032..7fa0c8a8 100644 --- a/src/soc/simulator/test_sim.py +++ b/src/soc/simulator/test_sim.py @@ -225,7 +225,7 @@ class GeneralTestCases(FHDLTestCase): "addis 12, 0, 0", ] with Program(lst) as program: - self.run_tst_program(program, [0, 12]) + self.run_tst_program(program, [12]) def run_tst_program(self, prog, initial_regs=None, initial_sprs=None, initial_mem=None): @@ -244,6 +244,7 @@ class DecoderBase: gen = list(generator.generate_instructions()) insn_code = generator.assembly.splitlines() instructions = list(zip(gen, insn_code)) + bigendian = False pdecode = create_pdecode() m.submodules.pdecode2 = pdecode2 = PowerDecode2(pdecode) @@ -254,12 +255,13 @@ class DecoderBase: simulator = ISA(pdecode2, [0] * 32, {}, 0, initial_mem, 0, initial_insns=gen, respect_pc=True, disassembly=insn_code, - initial_pc=initial_pc) + initial_pc=initial_pc, + bigendian=bigendian) sim = Simulator(m) def process(): - yield pdecode2.dec.bigendian.eq(1) + #yield pdecode2.dec.bigendian.eq(1) yield Settle() while True: -- 2.30.2