From f36dda3b640088390c182eae1a44f07d1041eb27 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Sun, 23 Jul 2017 12:28:26 +0200 Subject: [PATCH] re PR target/80569 (i686: "shrx" instruction generated in 16-bit mode) PR target/80569 * config/i386/i386.c (ix86_option_override_internal): Disable BMI, BMI2 and TBM instructions for -m16. testsuite/ChangeLog: PR target/80569 * gcc.target/i386/pr80569.c: New test. From-SVN: r250459 --- gcc/ChangeLog | 22 ++++++++++++++-------- gcc/config/i386/i386.c | 6 ++++++ gcc/testsuite/ChangeLog | 5 +++++ gcc/testsuite/gcc.target/i386/pr80569.c | 9 +++++++++ 4 files changed, 34 insertions(+), 8 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/pr80569.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8ec7a798b1d..4554109cc39 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-07-23 Uros Bizjak + + PR target/80569 + * config/i386/i386.c (ix86_option_override_internal): Disable + BMI, BMI2 and TBM instructions for -m16. + 2017-07-21 Carl Love * config/rs6000/rs6000-c.c (altivec_overloaded_builtins): Add @@ -384,10 +390,10 @@ 2017-07-18 Robin Dapp - * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Remove + * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Remove body_cost_vec from _vect_peel_extended_info. (vect_peeling_hash_get_lowest_cost): Do not set body_cost_vec. - (vect_peeling_hash_choose_best_peeling): Remove body_cost_vec and + (vect_peeling_hash_choose_best_peeling): Remove body_cost_vec and npeel. 2017-07-18 Bin Cheng @@ -431,7 +437,7 @@ 2017-07-17 Yury Gribov - * tree-vrp.c (compare_assert_loc): Fix comparison function + * tree-vrp.c (compare_assert_loc): Fix comparison function to return predictable results. 2017-07-17 Claudiu Zissulescu @@ -3422,11 +3428,11 @@ 2017-06-27 Jerome Lambourg * config/vxworks.h (VXWORKS_LIBS_RTP): Alternative definition for - 64bit configurations. - (PTR_DIFF_TYPE): Alternative definition for TARGET_LP64. - (SIZE_TYPE): Likewise. - * config/vxworks.c (vxworks_emutls_var_fields): Use - long_unsigned_type_node instead of unsigned_type_node as the offset + 64bit configurations. + (PTR_DIFF_TYPE): Alternative definition for TARGET_LP64. + (SIZE_TYPE): Likewise. + * config/vxworks.c (vxworks_emutls_var_fields): Use + long_unsigned_type_node instead of unsigned_type_node as the offset field type, which is "pointer" mode in emutls.c. 2017-06-27 Jakub Jelinek diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index ca29135d39f..b7ef5544bfd 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -6284,6 +6284,12 @@ ix86_option_override_internal (bool main_args_p, opts->x_ix86_isa_flags |= OPTION_MASK_ISA_LZCNT & ~opts->x_ix86_isa_flags_explicit; + /* Disable BMI, BMI2 and TBM instructions for -m16. */ + if (TARGET_16BIT_P(opts->x_ix86_isa_flags)) + opts->x_ix86_isa_flags + &= ~((OPTION_MASK_ISA_BMI | OPTION_MASK_ISA_BMI2 | OPTION_MASK_ISA_TBM) + & ~opts->x_ix86_isa_flags_explicit); + /* Validate -mpreferred-stack-boundary= value or default it to PREFERRED_STACK_BOUNDARY_DEFAULT. */ ix86_preferred_stack_boundary = PREFERRED_STACK_BOUNDARY_DEFAULT; diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index b36cd5e6778..02632357096 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-07-23 Uros Bizjak + + PR target/80569 + * gcc.target/i386/pr80569.c: New test. + 2017-07-21 Carl Love * gcc.target/powerpc/builtins-2.c (vmulosh, vmulouh, vmulesh, diff --git a/gcc/testsuite/gcc.target/i386/pr80569.c b/gcc/testsuite/gcc.target/i386/pr80569.c new file mode 100644 index 00000000000..8e11c40bb08 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr80569.c @@ -0,0 +1,9 @@ +/* PR target/80569 */ +/* { dg-do assemble } */ +/* { dg-options "-O2 -m16 -march=haswell" } */ + +void load_kernel(void *setup_addr) +{ + unsigned int seg = (unsigned int)setup_addr >> 4; + asm("movl %0, %%es" : : "r"(seg)); +} -- 2.30.2