From f372e8c88054400a9c44d4fcf4d84fb072707f8a Mon Sep 17 00:00:00 2001 From: Florent Kermarrec Date: Fri, 23 Feb 2018 14:15:41 +0100 Subject: [PATCH] README: cleanup --- README | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/README b/README index 0f6d2521..72e1986a 100644 --- a/README +++ b/README @@ -11,7 +11,11 @@ -------- LiteX is an alternative to MiSoC maintained and used by Enjoy-Digital to build our cores, integrate them in complete SoC and load/flash them to the hardware -and experiment new features. +and experiment new features. (structure is kept close to MiSoC to ease +collaboration) + +Typical LiteX design flow: +-------------------------- +---------------+ |FPGA toolchains| @@ -26,15 +30,12 @@ and experiment new features. +----------------------+ | | |LiteX Cores Ecosystem +--> | +----------------------+ +-^-------^-+ - (Eth,,SATA,,DRAM,,USB, | | - PCIe,Video,etc...) + + + (Eth, SATA, DRAM, USB, | | + PCIe, Video, etc...) + + board target file file -The structure of LiteX is kept close to MiSoC to ease collaboration between -projects. - [> Sub-packages --------------- gen: -- 2.30.2