From f39bad9fd050ea3ba39cb68eb3121915da4936c2 Mon Sep 17 00:00:00 2001 From: Pat Haugen Date: Wed, 8 Feb 2017 20:49:14 +0000 Subject: [PATCH] re PR target/78604 (test case gcc.target/powerpc/p8vector-vectorize-1.c fails starting with r242750) PR target/78604 * config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Invert condition/operands for integer GE/LE/GEU/LEU operations. * gcc.target/powerpc/pr78604.c: New. From-SVN: r245285 --- gcc/ChangeLog | 6 ++ gcc/config/rs6000/rs6000.c | 19 +++- gcc/testsuite/ChangeLog | 5 + gcc/testsuite/gcc.target/powerpc/pr78604.c | 112 +++++++++++++++++++++ 4 files changed, 141 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/powerpc/pr78604.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index f3f5db9855c..11c96925491 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2017-02-08 Pat Haugen + + PR target/78604 + * config/rs6000/rs6000.c (rs6000_emit_vector_cond_expr): Invert + condition/operands for integer GE/LE/GEU/LEU operations. + 2017-02-08 Segher Boessenkool PR translation/79397 diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index f1dec8c3644..10cbea97bed 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -25150,12 +25150,29 @@ rs6000_emit_vector_cond_expr (rtx dest, rtx op_true, rtx op_false, return 0; break; - /* Mark unsigned tests with CCUNSmode. */ + case GE: + case LE: + if (GET_MODE_CLASS (mask_mode) == MODE_VECTOR_INT) + { + /* Invert condition to avoid compound test. */ + invert_move = true; + rcode = reverse_condition (rcode); + } + break; + case GTU: case GEU: case LTU: case LEU: + /* Mark unsigned tests with CCUNSmode. */ cc_mode = CCUNSmode; + + /* Invert condition to avoid compound test if necessary. */ + if (rcode == GEU || rcode == LEU) + { + invert_move = true; + rcode = reverse_condition (rcode); + } break; default: diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index fe461265619..ba3016571d1 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,8 @@ +2017-02-08 Pat Haugen + + PR target/78604 + * gcc.target/powerpc/pr78604.c: New. + 2017-02-08 Kelvin Nilsen PR target/68972 diff --git a/gcc/testsuite/gcc.target/powerpc/pr78604.c b/gcc/testsuite/gcc.target/powerpc/pr78604.c new file mode 100644 index 00000000000..2ee5ab9b12c --- /dev/null +++ b/gcc/testsuite/gcc.target/powerpc/pr78604.c @@ -0,0 +1,112 @@ +/* { dg-do compile { target { powerpc*-*-* } } } */ +/* { dg-skip-if "" { powerpc*-*-darwin* } { "*" } { "" } } */ +/* { dg-require-effective-target powerpc_p8vector_ok } */ +/* { dg-skip-if "do not override -mcpu" { powerpc*-*-* } { "-mcpu=*" } { "-mcpu=power8" } } */ +/* { dg-options "-mcpu=power8 -O2 -ftree-vectorize" } */ + +#ifndef SIZE +#define SIZE 1024 +#endif + +#ifndef ALIGN +#define ALIGN 32 +#endif + +#ifndef TYPE +#define TYPE long long +#endif + +#ifndef SIGN_TYPE +#define SIGN_TYPE signed TYPE +#endif + +#ifndef UNS_TYPE +#define UNS_TYPE unsigned TYPE +#endif + +#define ALIGN_ATTR __attribute__((__aligned__(ALIGN))) + +SIGN_TYPE sa[SIZE] ALIGN_ATTR; +SIGN_TYPE sb[SIZE] ALIGN_ATTR; +SIGN_TYPE sc[SIZE] ALIGN_ATTR; + +UNS_TYPE ua[SIZE] ALIGN_ATTR; +UNS_TYPE ub[SIZE] ALIGN_ATTR; +UNS_TYPE uc[SIZE] ALIGN_ATTR; + +void +sign_lt (SIGN_TYPE val1, SIGN_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] < sc[i]) ? val1 : val2; +} + +void +sign_lte (SIGN_TYPE val1, SIGN_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] <= sc[i]) ? val1 : val2; +} + +void +sign_gt (SIGN_TYPE val1, SIGN_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] > sc[i]) ? val1 : val2; +} + +void +sign_gte (SIGN_TYPE val1, SIGN_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + sa[i] = (sb[i] >= sc[i]) ? val1 : val2; +} + + +void +uns_lt (UNS_TYPE val1, UNS_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] < uc[i]) ? val1 : val2; +} + +void +uns_lte (UNS_TYPE val1, UNS_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] <= uc[i]) ? val1 : val2; +} + +void +uns_gt (UNS_TYPE val1, UNS_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] > uc[i]) ? val1 : val2; +} + +void +uns_gte (UNS_TYPE val1, UNS_TYPE val2) +{ + unsigned long i; + + for (i = 0; i < SIZE; i++) + ua[i] = (ub[i] >= uc[i]) ? val1 : val2; +} + +/* { dg-final { scan-assembler-times {\mvcmpgtsd\M} 4 } } */ +/* { dg-final { scan-assembler-times {\mvcmpgtud\M} 4 } } */ +/* { dg-final { scan-assembler-not {\mvcmpequd\M} } } */ -- 2.30.2