From f3bed0d0238c1ff6c3f35554f542589b0ada9f7b Mon Sep 17 00:00:00 2001
From: "colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0"
 <colepoirier@1ec9c8c87c85f09e4718cd80e0605065e33975f0@web>
Date: Tue, 1 Mar 2022 21:06:55 +0000
Subject: [PATCH]

---
 about_us.mdwn | 10 ++++------
 1 file changed, 4 insertions(+), 6 deletions(-)

diff --git a/about_us.mdwn b/about_us.mdwn
index a62dc3759..1f47ec041 100644
--- a/about_us.mdwn
+++ b/about_us.mdwn
@@ -89,12 +89,6 @@ Alain's website: <http://phcomp.co.uk>
 * Digital circuit design
 * Availability: Outside normal working hours.
 
-## [[Cole Poirier|cole]]
-
-* Trying to learn and organize stuff
-* GitHub: [[https://github.com/colepoirier]]
-* Availability: full-time
-
 ## [[Sanjay A Menon|Sanjay]]
 
 * Skills: Verilog, C/C++, Python, TCL & PERL
@@ -212,3 +206,7 @@ Alain's website: <http://phcomp.co.uk>
 * Experience : Domain Specific Architecture Design and Implementation, IP Core Development, System on Chip, FPGA System Design, Chip Tapeout, Crypto Chip Design, Authentication Protocol Design. 
 * LinkedIn Profile: [[https://www.linkedin.com/in/manikandan-nagarajan-2156171a0/]]
 * Availability: 8~10hrs/week
+
+## Former Members
+
+### [[Cole Poirier|cole]]
-- 
2.30.2