From f3e10a2bd8d0939f737721c27e3a725f43ef16ac Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Tue, 1 Jul 2008 18:13:40 +0200 Subject: [PATCH] i386.c (ix86_build_signbit_mask): Generate TImode and TFmode constants via two element DImode vector for hosts... * config/i386/i386.c (ix86_build_signbit_mask): Generate TImode and TFmode constants via two element DImode vector for hosts with HOST_BITS_PER_WIDE_INT < 64. (ix86_init_builtins): Define __builtin_fabsq and __builtin_copysignq also for HOST_BITS_PER_WIDE_INT < 64. testsuite/ChangeLog: * gcc.target/i386/quad-sse.c: New test. From-SVN: r137322 --- gcc/ChangeLog | 29 +++++++------ gcc/config/i386/i386.c | 53 +++++++++++++++++------- gcc/testsuite/ChangeLog | 6 ++- gcc/testsuite/gcc.target/i386/quad-sse.c | 21 ++++++++++ 4 files changed, 80 insertions(+), 29 deletions(-) create mode 100644 gcc/testsuite/gcc.target/i386/quad-sse.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7d1daef0f83..24766f8621f 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2008-07-01 Uros Bizjak + + * config/i386/i386.c (ix86_build_signbit_mask): Generate TImode and + TFmode constants via two element DImode vector for hosts with + HOST_BITS_PER_WIDE_INT < 64. + (ix86_init_builtins): Define __builtin_fabsq and __builtin_copysignq + also for HOST_BITS_PER_WIDE_INT < 64. + 2008-07-01 Richard Guenther PR tree-optimization/36666 @@ -14,8 +22,7 @@ if the results address is not taken. (do_deref): Use get_constraint_exp_for_temp. (get_constraint_for_1): Rename from ... - (get_constraint_for): ... this. Add the old function as - wrapper. + (get_constraint_for): ... this. Add the old function as wrapper. (do_structure_copy): Use get_constraint_for_1. 2008-07-01 Martin Jambor @@ -39,25 +46,23 @@ * config/darwin-driver.c (darwin_default_min_version): Fix -Wc++-compat warnings. -2008-06-30 Uros Bizjak +2008-06-30 Uros Bizjak * config/i386/i386.md (*movti_rex64): Add "!" to "r" constraint of operand 0. 2008-06-30 Kenneth Zadeck - * ifcvt.c (cond_move_process_if_block): Free vectors on false - return. + * ifcvt.c (cond_move_process_if_block): Free vectors on false return. 2008-06-30 Kenneth Zadeck PR rtl-optimization/34744 - * df-scan.c (df_scan_free_ref_vec, df_scan_free_mws_vec): New - macros. + * df-scan.c (df_scan_free_ref_vec, df_scan_free_mws_vec): New macros. (df_scan_free_internal): Free data structures not allocated in storage pools. (df_mw_hardreg_chain_delete_eq_uses): Use df_scan_free_mws_vec. - (df_refs_add_to_chains): Use df_scan_free_ref_vec and + (df_refs_add_to_chains): Use df_scan_free_ref_vec and df_scan_free_mws_vec. * dse.c (dse_step6): Free offset_map_p and offset_map_n unconditionally. @@ -202,7 +207,7 @@ * doc/rtl.texi (const_vector): Document const_fixed as legitimate element type of const_vector. -2008-06-28 Uros Bizjak +2008-06-28 Uros Bizjak * config/i386/i386.md (addti3, adddi3, addsi3, addhi3, addqi3): Remove FLAGS_REG clobber from expander pattern. @@ -266,7 +271,7 @@ (init_one_libfunc): Reuse decls and SYMBOL_REFs when asked for the same function twice. -2008-06-27 Uros Bizjak +2008-06-27 Uros Bizjak * config/i386/i386.md (ashlti3, ashrti3, lshrti3): Expand using ix86_expand_binary_operator directly. @@ -833,7 +838,7 @@ have_similar_memory_accesses_1, ref_base_address_1): Likewise. * tree-ssa-phiopt.c (name_to_bb_hash): Likewise. -2008-06-25 Uros Bizjak +2008-06-25 Uros Bizjak PR target/36627 * config/i386/i386.md : Change constraints of HImode and QImode @@ -2155,7 +2160,7 @@ * config/vax/vaxv.h: Remove. * config/windiss.h: Remove. -2008-06-06 Uros Bizjak +2008-06-06 Uros Bizjak PR rtl-optimization/36438 * cse.c (fold_rtx) [ASHIFT, LSHIFTRT, ASHIFTRT]: Break out early diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 2edeec01c58..5a2c0c870a7 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -11330,10 +11330,35 @@ ix86_build_signbit_mask (enum machine_mode mode, bool vect, bool invert) case TImode: case TFmode: - imode = TImode; vec_mode = VOIDmode; - gcc_assert (HOST_BITS_PER_WIDE_INT >= 64); - lo = 0, hi = (HOST_WIDE_INT)1 << shift; + if (HOST_BITS_PER_WIDE_INT >= 64) + { + imode = TImode; + lo = 0, hi = (HOST_WIDE_INT)1 << shift; + } + else + { + rtvec vec; + + imode = DImode; + lo = 0, hi = (HOST_WIDE_INT)1 << (shift - HOST_BITS_PER_WIDE_INT); + + if (invert) + { + lo = ~lo, hi = ~hi; + v = constm1_rtx; + } + else + v = const0_rtx; + + mask = immed_double_const (lo, hi, imode); + + vec = gen_rtvec (2, v, mask); + v = gen_rtx_CONST_VECTOR (V2DImode, vec); + v = copy_to_mode_reg (mode, gen_lowpart (mode, v)); + + return v; + } break; default: @@ -20222,20 +20247,16 @@ ix86_init_builtins (void) NULL, NULL_TREE); ix86_builtins[(int) IX86_BUILTIN_INFQ] = decl; - if (HOST_BITS_PER_WIDE_INT >= 64) - { - /* Those builtins need TImode to compile. */ - ftype = build_function_type_list (float128_type_node, - float128_type_node, - NULL_TREE); - def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ); + ftype = build_function_type_list (float128_type_node, + float128_type_node, + NULL_TREE); + def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_fabsq", ftype, IX86_BUILTIN_FABSQ); - ftype = build_function_type_list (float128_type_node, - float128_type_node, - float128_type_node, - NULL_TREE); - def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_copysignq", ftype, IX86_BUILTIN_COPYSIGNQ); - } + ftype = build_function_type_list (float128_type_node, + float128_type_node, + float128_type_node, + NULL_TREE); + def_builtin_const (OPTION_MASK_ISA_SSE2, "__builtin_copysignq", ftype, IX86_BUILTIN_COPYSIGNQ); if (TARGET_MMX) ix86_init_mmx_sse_builtins (); diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index e74fb52c3ac..0d48ea94e89 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,7 @@ +2008-07-01 Uros Bizjak + + * gcc.target/i386/quad-sse.c: New test. + 2008-07-01 Richard Guenther PR tree-optimization/36666 @@ -12,7 +16,7 @@ PR target/36598 * gcc.dg/memcpy-1.c: Mark test XFAIL for avr target. -2008-06-30 Uros Bizjak +2008-06-30 Uros Bizjak * gcc.target/i386/movti.c: New test. diff --git a/gcc/testsuite/gcc.target/i386/quad-sse.c b/gcc/testsuite/gcc.target/i386/quad-sse.c new file mode 100644 index 00000000000..fed61122f19 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/quad-sse.c @@ -0,0 +1,21 @@ +/* { dg-do compile } */ +/* { dg-options "-O2 -msse2" } */ + +__float128 x, y; + +__float128 test_1(void) +{ + return -x; +} + +__float128 test_2(void) +{ + return __builtin_fabsq (x); +} + +__float128 test_3(void) +{ + return __builtin_copysignq (x, y); +} + +/* { dg-final { scan-assembler-not "call" } } */ -- 2.30.2