From f4356120ba88c083dd5987376aab7590dd1e0e13 Mon Sep 17 00:00:00 2001 From: Uros Bizjak Date: Fri, 15 May 2020 09:24:38 +0200 Subject: [PATCH] i386: Add V2SFmode hadd/hsub instructions [PR95046] PFACC/PFNACC 3dNow! instructions got their corresponding SSE alternative in SSE3, so these can't be implemented with TARGET_MMX_WITH_SSE, which implies SSE2. These instructions are only generated via builtins, and since several 3dNow! insns have no corresponding SSE alternative, we can't avoid MMX registers with 3dNow! builtins anyway. Add SSE3/AVX alternatives to the insn pattern, so compiler will be able to use XMM registers when available, but don't prevent MMX registers, since they are needed when SSE3 is not active. Add additional generic insn patterns, used by the combiner to synthesize horizontal V2SFmode add/sub instructions. These patterns are active for TARGET_MMX_WITH_SSE only, and use only XMM registers. gcc/ChangeLog: PR target/95046 * config/i386/i386.md (isa): Add sse3_noavx. (enabled): Handle sse3_noavx. * config/i386/mmx.md (mmx_haddv2sf3): New expander. (*mmx_haddv2sf3): Rename from mmx_haddv2sf3. Add SSE/AVX alternatives. Match commutative vec_select selector operands. (*mmx_haddv2sf3_low): New insn pattern. (*mmx_hsubv2sf3): Add SSE/AVX alternatives. (*mmx_hsubv2sf3_low): New insn pattern. testsuite/ChangeLog: PR target/95046 * gcc.target/i386/pr95046-8.c: New test. --- gcc/testsuite/gcc.target/i386/pr95046-8.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr95046-8.c diff --git a/gcc/testsuite/gcc.target/i386/pr95046-8.c b/gcc/testsuite/gcc.target/i386/pr95046-8.c new file mode 100644 index 00000000000..e164fd4ea37 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr95046-8.c @@ -0,0 +1,22 @@ +/* PR target/95046 */ +/* { dg-do compile { target { ! ia32 } } } */ +/* { dg-options "-O2 -msse3" } */ + + +typedef float __v2sf __attribute__ ((__vector_size__ (8))); + +float +foo (__v2sf a) +{ + return a[0] + a[1]; +} + +/* { dg-final { scan-assembler "\tv?haddps" } } */ + +float +bar (__v2sf a) +{ + return a[0] - a[1]; +} + +/* { dg-final { scan-assembler "\tv?hsubps" } } */ -- 2.30.2