From f4b977bf3dba2b68ebda5b2c0823e4cc6d80192b Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Fri, 29 Jul 2016 15:48:18 +0200 Subject: [PATCH] gallium/radeon: add r600_resource::vram_usage and gart_usage MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle --- .../drivers/radeon/r600_buffer_common.c | 10 ++++++++++ src/gallium/drivers/radeon/r600_pipe_common.c | 18 ++++++------------ src/gallium/drivers/radeon/r600_pipe_common.h | 3 +++ 3 files changed, 19 insertions(+), 12 deletions(-) diff --git a/src/gallium/drivers/radeon/r600_buffer_common.c b/src/gallium/drivers/radeon/r600_buffer_common.c index 9c7eac57970..4480293245f 100644 --- a/src/gallium/drivers/radeon/r600_buffer_common.c +++ b/src/gallium/drivers/radeon/r600_buffer_common.c @@ -197,6 +197,16 @@ bool r600_init_resource(struct r600_common_screen *rscreen, util_range_set_empty(&res->valid_buffer_range); res->TC_L2_dirty = false; + /* Set expected VRAM and GART usage for the buffer. */ + res->vram_usage = 0; + res->gart_usage = 0; + + if (res->domains & RADEON_DOMAIN_VRAM) + res->vram_usage = size; + else if (res->domains & RADEON_DOMAIN_GTT) + res->gart_usage = size; + + /* Print debug information. */ if (rscreen->debug_flags & DBG_VM && res->b.b.target == PIPE_BUFFER) { fprintf(stderr, "VM start=0x%"PRIX64" end=0x%"PRIX64" | Buffer %"PRIu64" bytes\n", res->gpu_address, res->gpu_address + res->buf->size, diff --git a/src/gallium/drivers/radeon/r600_pipe_common.c b/src/gallium/drivers/radeon/r600_pipe_common.c index 6f4fc98271b..8fae74d7add 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.c +++ b/src/gallium/drivers/radeon/r600_pipe_common.c @@ -144,16 +144,12 @@ void r600_need_dma_space(struct r600_common_context *ctx, unsigned num_dw, uint64_t vram = 0, gtt = 0; if (dst) { - if (dst->domains & RADEON_DOMAIN_VRAM) - vram += dst->buf->size; - else if (dst->domains & RADEON_DOMAIN_GTT) - gtt += dst->buf->size; + vram += dst->vram_usage; + gtt += dst->gart_usage; } if (src) { - if (src->domains & RADEON_DOMAIN_VRAM) - vram += src->buf->size; - else if (src->domains & RADEON_DOMAIN_GTT) - gtt += src->buf->size; + vram += src->vram_usage; + gtt += src->gart_usage; } /* Flush the GFX IB if DMA depends on it. */ @@ -530,10 +526,8 @@ void r600_context_add_resource_size(struct pipe_context *ctx, struct pipe_resour * In practice this gave very good estimate (+/- 10% of the target * memory limit). */ - if (rr->domains & RADEON_DOMAIN_VRAM) - rctx->vram += rr->buf->size; - else if (rr->domains & RADEON_DOMAIN_GTT) - rctx->gtt += rr->buf->size; + rctx->vram += rr->vram_usage; + rctx->gtt += rr->gart_usage; } /* diff --git a/src/gallium/drivers/radeon/r600_pipe_common.h b/src/gallium/drivers/radeon/r600_pipe_common.h index 3bebd00a56a..1f665d47dcf 100644 --- a/src/gallium/drivers/radeon/r600_pipe_common.h +++ b/src/gallium/drivers/radeon/r600_pipe_common.h @@ -170,6 +170,9 @@ struct r600_resource { /* Winsys objects. */ struct pb_buffer *buf; uint64_t gpu_address; + /* Memory usage if the buffer placement is optimal. */ + uint64_t vram_usage; + uint64_t gart_usage; /* Resource state. */ enum radeon_bo_domain domains; -- 2.30.2