From f4d166ba74226145695286a18d0b936781f087ce Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 5 Sep 2021 17:09:31 +0100 Subject: [PATCH] --- openpower/sv/ldst.mdwn | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/openpower/sv/ldst.mdwn b/openpower/sv/ldst.mdwn index 9354957b8..1d56ac9a4 100644 --- a/openpower/sv/ldst.mdwn +++ b/openpower/sv/ldst.mdwn @@ -20,8 +20,7 @@ basis may be found to be no different from RISC Scalar equivalents. The resource savings from Vector LD/ST are significant and stem from the fact that one single instruction can trigger a dozen (or in some -microarchitectures such as Cray or NEC SX Aurora) hundreds of element -level Memory accesses. +microarchitectures such as Cray or NEC SX Aurora) hundreds of element-level Memory accesses. Additionally, and simply: if the Arithmetic side of an ISA supports Vector Operations, then in order to keep the ALUs 100% occupied the -- 2.30.2