From f5264b52cfaa000c6acc8220a7037ca9ac01085c Mon Sep 17 00:00:00 2001 From: David Edelsohn Date: Wed, 9 Oct 2002 04:28:12 +0000 Subject: [PATCH] rs6000.md (movdf splitter): Use gen_int_mode on 64-bit hosts. * config/rs6000/rs6000.md (movdf splitter): Use gen_int_mode on 64-bit hosts. (movtf_internal): Reference correct displacement for second value in memory. (movtf splitter): Correct generation of constants in 64-bit mode. From-SVN: r57969 --- gcc/ChangeLog | 8 ++++++++ gcc/config/rs6000/rs6000.md | 27 +++++++++++++++++++-------- 2 files changed, 27 insertions(+), 8 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 8b4e01585f9..87408b9d28a 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,11 @@ +2002-10-09 David Edelsohn + + * config/rs6000/rs6000.md (movdf splitter): Use gen_int_mode on + 64-bit hosts. + (movtf_internal): Reference correct displacement for second value + in memory. + (movtf splitter): Correct generation of constants in 64-bit mode. + 2002-10-09 Alan Modra * libgcc2.c (__floatdisf): Properly cure double rounding. diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index 13adeca14b0..be204691579 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8519,7 +8519,7 @@ val = ((HOST_WIDE_INT)(unsigned long)l[endian] << 32 | ((HOST_WIDE_INT)(unsigned long)l[1 - endian])); - operands[3] = immed_double_const (val, -(val < 0), DImode); + operands[3] = gen_int_mode (val, DImode); #else operands[3] = immed_double_const (l[1 - endian], l[endian], DImode); #endif @@ -8729,9 +8729,9 @@ else return \"fmr %0,%1\;fmr %L0,%L1\"; case 1: - return \"lfd %0,%1\;lfd %L0,%L1\"; + return \"lfd %0,%1\;lfd %L0,%Y1\"; case 2: - return \"stfd %1,%0\;stfd %L1,%L0\"; + return \"stfd %1,%0\;stfd %L1,%Y0\"; case 3: case 4: case 5: @@ -8743,7 +8743,7 @@ (define_split [(set (match_operand:TF 0 "gpc_reg_operand" "") - (match_operand:TF 1 "const_double_operand" ""))] + (match_operand:TF 1 "easy_fp_constant" ""))] "(DEFAULT_ABI == ABI_AIX || DEFAULT_ABI == ABI_DARWIN) && TARGET_HARD_FLOAT && TARGET_FPRS && ! TARGET_POWERPC64 && TARGET_LONG_DOUBLE_128 && reload_completed @@ -8789,14 +8789,25 @@ { long l[4]; REAL_VALUE_TYPE rv; + HOST_WIDE_INT val; REAL_VALUE_FROM_CONST_DOUBLE (rv, operands[1]); REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv, l); - operands[2] = operand_subword (operands[0], 0, 0, TFmode); - operands[3] = operand_subword (operands[0], 1, 0, TFmode); - operands[4] = gen_int_mode (l[0], DImode); - operands[5] = gen_int_mode (l[1], DImode); + operands[2] = gen_lowpart (DImode, operands[0]); + operands[3] = gen_highpart (DImode, operands[0]); +#if HOST_BITS_PER_WIDE_INT >= 64 + val = ((HOST_WIDE_INT)(unsigned long)l[0] << 32 | + ((HOST_WIDE_INT)(unsigned long)l[1])); + operands[4] = gen_int_mode (val, DImode); + + val = ((HOST_WIDE_INT)(unsigned long)l[2] << 32 | + ((HOST_WIDE_INT)(unsigned long)l[3])); + operands[5] = gen_int_mode (val, DImode); +#else + operands[4] = immed_double_const (l[1], l[0], DImode); + operands[5] = immed_double_const (l[3], l[2], DImode); +#endif }") (define_insn_and_split "extenddftf2" -- 2.30.2