From f5380436d443c64c1483fcfe67de7eeae4c7ebd8 Mon Sep 17 00:00:00 2001 From: lkcl Date: Sun, 24 Apr 2022 23:10:48 +0100 Subject: [PATCH] --- openpower/sv/biginteger/analysis.mdwn | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/openpower/sv/biginteger/analysis.mdwn b/openpower/sv/biginteger/analysis.mdwn index 5b56081de..fb1184c8f 100644 --- a/openpower/sv/biginteger/analysis.mdwn +++ b/openpower/sv/biginteger/analysis.mdwn @@ -5,6 +5,7 @@ * Revision 0.0: 21apr2022 * Revision 0.01: 22apr2022 removal of msubed because sv.madded and sv.subfe works * Revision 0.02: 22apr2022 128/64 scalar divide, investigate Goldschmidt +* Revision 0.03: 24apr2022 add 128/64 divrem2du, similar loop to madded This page covers an analysis of big integer operations, to work out optimal Scalar Instructions to propose be submitted to @@ -398,5 +399,9 @@ the remainder. RT = UDIV(dividend, divisor) RS = UREM(dividend, divisor) -Again, using EXTRA mode bit 8 allows for selecting whether RS=RC or -RS=RT+VL. +Again, in an SVP64 context, using EXTRA mode bit 8 allows for +selecting whether `RS=RC` or +`RS=RT+VL`. Similar flexibility in the scalar-vector settings +allows the instruction to perform full parallel vector div/mod, +or act in loop-back mode for big-int division by a scalar, +or for a single scalar 128/64 div/mod. -- 2.30.2