From f53f79e8f2ec9076ab0cfbc6e929e22609f29e43 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 19 Jul 2020 11:59:32 +0100 Subject: [PATCH] if nmigen.sim.pysim import fails use nmigen.back.pysim --- src/soc/fu/div/test/test_fsm.py | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/src/soc/fu/div/test/test_fsm.py b/src/soc/fu/div/test/test_fsm.py index 75f606fc..fc66d148 100644 --- a/src/soc/fu/div/test/test_fsm.py +++ b/src/soc/fu/div/test/test_fsm.py @@ -2,7 +2,10 @@ import unittest from soc.fu.div.fsm import DivState, DivStateInit, DivStateNext from nmigen import Elaboratable, Module, Signal, unsigned from nmigen.cli import rtlil -from nmigen.sim.pysim import Simulator, Delay, Tick +try: + from nmigen.sim.pysim import Simulator, Delay, Tick +except ImportError: + from nmigen.back.pysim import Simulator, Delay, Tick class CheckEvent(Elaboratable): -- 2.30.2