From f57bcc613506429669849ad4dfd285111ee9bd05 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Wed, 17 Jun 2020 05:14:40 +0100 Subject: [PATCH] output to issuer_simulator.vcd --- src/soc/simple/test/test_issuer.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/simple/test/test_issuer.py b/src/soc/simple/test/test_issuer.py index 0bf9246a..74ad0543 100644 --- a/src/soc/simple/test/test_issuer.py +++ b/src/soc/simple/test/test_issuer.py @@ -114,7 +114,7 @@ class TestRunner(FHDLTestCase): yield from check_sim_memory(self, l0, sim, code) sim.add_sync_process(process) - with sim.write_vcd("core_simulator.vcd", "core_simulator.gtkw", + with sim.write_vcd("issuer_simulator.vcd", traces=[]): sim.run() -- 2.30.2