From f58acb677967a07e7bafe5f886812cde60a1832c Mon Sep 17 00:00:00 2001 From: Stan Cox Date: Mon, 9 Dec 1996 21:29:02 +0000 Subject: [PATCH] Remove change of Oct 4. From-SVN: r13256 --- gcc/config/i386/i386.h | 26 ----- gcc/config/i386/i386.md | 240 +++++++++++----------------------------- 2 files changed, 63 insertions(+), 203 deletions(-) diff --git a/gcc/config/i386/i386.h b/gcc/config/i386/i386.h index 04dd49ffdb7..a28c503cdaf 100644 --- a/gcc/config/i386/i386.h +++ b/gcc/config/i386/i386.h @@ -2593,32 +2593,6 @@ do { \ } while (0) -/* Helper macros to decide if the rtl of some instruction - will cause problems due to register shortage. */ - -/* ??? flags.h is not self-contained */ -extern int flag_omit_frame_pointer; -/* ??? neither is function.h */ -extern struct function *outer_function_chain; -/* ??? neither is expr.h */ -extern int current_function_calls_alloca; -/* ??? No header file for rtx_equal_function_value_matters */ -extern int rtx_equal_function_value_matters; - -#define N_REGS_USED(op) \ - (GET_CODE (op) == MEM \ - ? (GET_CODE (XEXP (op, 0)) == PLUS \ - ? (rtx_varies_p (XEXP (XEXP (op, 0), 0)) \ - + rtx_varies_p (XEXP (XEXP (op, 0), 1))) \ - : rtx_varies_p (XEXP (op, 0))) \ - : (GET_CODE (op) == REG ? HARD_REGNO_NREGS (REGNO (op), GET_MODE (op)) : 0)) - -#define N_ALLOCATABLE_REGISTERS \ - (6 - (flag_pic != 0) - (outer_function_chain != 0) \ - + (flag_omit_frame_pointer && ! rtx_equal_function_value_matters \ - && ! current_function_calls_alloca)) - - /* Functions in i386.c */ extern void override_options (); extern void order_regs_for_local_alloc (); diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index bbd24f56da0..fa969b5c4f5 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -1128,9 +1128,7 @@ if (TARGET_MOVE && (reload_in_progress | reload_completed) == 0 && GET_CODE (operands[0]) == MEM - && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], SFmode)) - && (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - < N_ALLOCATABLE_REGISTERS)) + && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], SFmode))) { rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], SFmode)) ? gen_movsf_push @@ -1236,8 +1234,7 @@ [(set (match_operand:SF 0 "memory_operand" "=m") (match_operand:SF 1 "memory_operand" "m")) (clobber (match_scratch:SI 2 "=&r"))] - "N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - < N_ALLOCATABLE_REGISTERS" + "" "* { output_asm_insn (AS2 (mov%L2,%1,%2), operands); @@ -1248,10 +1245,7 @@ (define_insn "movsf_normal" [(set (match_operand:SF 0 "nonimmediate_operand" "=*rfm,*rf,f,!*rm") (match_operand:SF 1 "general_operand" "*rf,*rfm,fG,fF"))] - "! TARGET_MOVE || GET_CODE (operands[0]) != MEM - || GET_CODE (operands[1]) != MEM - || (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - == N_ALLOCATABLE_REGISTERS)" + "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) || (GET_CODE (operands[1]) != MEM)" "* { int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0; @@ -1329,9 +1323,7 @@ if (TARGET_MOVE && (reload_in_progress | reload_completed) == 0 && GET_CODE (operands[0]) == MEM - && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DFmode)) - && (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - < N_ALLOCATABLE_REGISTERS)) + && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], DFmode))) { rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], DFmode)) ? gen_movdf_push @@ -1431,18 +1423,15 @@ (match_operand:DF 1 "memory_operand" "o,o")) (clobber (match_scratch:SI 2 "=&r,&r")) (clobber (match_scratch:SI 3 "=&r,X"))] - "N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - < N_ALLOCATABLE_REGISTERS" + "" "* return output_move_memory (operands, insn, GET_MODE_SIZE (DFmode), 2, 4);") ;; For the purposes of regclass, prefer FLOAT_REGS. (define_insn "" [(set (match_operand:DF 0 "nonimmediate_operand" "=f,fm,!*rf,!*rm") (match_operand:DF 1 "general_operand" "fmG,f,*rfm,*rfF"))] - "! TARGET_MOVE || GET_CODE (operands[0]) != MEM - || GET_CODE (operands[1]) != MEM - || (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - == N_ALLOCATABLE_REGISTERS)" + "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) + || (GET_CODE (operands[1]) != MEM)" "* { int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0; @@ -1521,9 +1510,7 @@ if (TARGET_MOVE && (reload_in_progress | reload_completed) == 0 && GET_CODE (operands[0]) == MEM - && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], XFmode)) - && (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - < N_ALLOCATABLE_REGISTERS)) + && (GET_CODE (operands[1]) == MEM || push_operand (operands[0], XFmode))) { rtx (*genfunc) PROTO((rtx, rtx)) = (push_operand (operands[0], XFmode)) ? gen_movxf_push @@ -1621,17 +1608,14 @@ (match_operand:XF 1 "memory_operand" "o,o")) (clobber (match_scratch:SI 2 "=&r,&r")) (clobber (match_scratch:SI 3 "=&r,X"))] - "N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - < N_ALLOCATABLE_REGISTERS" + "" "* return output_move_memory (operands, insn, GET_MODE_SIZE (XFmode), 2, 4);") (define_insn "" [(set (match_operand:XF 0 "nonimmediate_operand" "=f,fm,!*rf,!*rm") (match_operand:XF 1 "general_operand" "fmG,f,*rfm,*rfF"))] - "! TARGET_MOVE || GET_CODE (operands[0]) != MEM - || GET_CODE (operands[1]) != MEM - || (N_REGS_USED (operands[0]) + N_REGS_USED (operands[1]) - == N_ALLOCATABLE_REGISTERS)" + "(!TARGET_MOVE || GET_CODE (operands[0]) != MEM) + || (GET_CODE (operands[1]) != MEM)" "* { int stack_top_dies = find_regno_note (insn, REG_DEAD, FIRST_STACK_REG) != 0; @@ -2610,7 +2594,7 @@ (define_expand "floatdixf2" [(set (match_operand:XF 0 "register_operand" "") (float:XF (match_operand:DI 1 "nonimmediate_operand" "")))] - "TARGET_80387" + "TARGET_80387 && LONG_DOUBLE_TYPE_SIZE == 96" "") ;; This will convert from SImode or DImode to MODE_FLOAT. @@ -2719,16 +2703,12 @@ ;;- add instructions -(define_insn "*addsidi3_1" - [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,r,o,&r,r,o,o") +(define_insn "addsidi3_1" + [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,r,o,!&r,!r,o,!o") (plus:DI (match_operand:DI 1 "general_operand" "0,0,0,o,riF,riF,o") (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,ri,roi,roi,ri,ri")))) (clobber (match_scratch:SI 3 "=X,X,X,X,X,X,&r"))] - "((rtx_equal_p (operands[0], operands[1]) ? 0 - : (N_REGS_USED (operands[0]) - + (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM))) - + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) - <= N_ALLOCATABLE_REGISTERS" + "" "* { rtx low[3], high[3], xops[7], temp; @@ -2771,16 +2751,12 @@ RET; }") -(define_insn "*addsidi3_2" - [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,r,o,&r,r,o,o") - (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,ri,o,ri,ri,ri")) - (match_operand:DI 1 "general_operand" "0,0,0,roiF,roiF,riF,o"))) - (clobber (match_scratch:SI 3 "=X,X,X,X,X,X,&r"))] - "((rtx_equal_p (operands[0], operands[2]) ? 0 - : (N_REGS_USED (operands[0]) - + (GET_CODE (operands[0]) == MEM && GET_CODE (operands[2]) == MEM))) - + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) - <= N_ALLOCATABLE_REGISTERS" +(define_insn "addsidi3_2" + [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,r,o,&r,!&r,r,o,o,!o") + (plus:DI (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,ri,o,o,ri,ri,i,r")) + (match_operand:DI 1 "general_operand" "0,0,0,iF,ro,roiF,riF,o,o"))) + (clobber (match_scratch:SI 3 "=X,X,X,X,X,X,X,&r,&r"))] + "" "* { rtx low[3], high[3], xops[7], temp; @@ -2853,49 +2829,12 @@ RET; }") -(define_expand "adddi3" - [(parallel [(set (match_operand:DI 0 "nonimmediate_operand" "") - (plus:DI (match_operand:DI 1 "general_operand" "") - (match_operand:DI 2 "general_operand" ""))) - (clobber (match_scratch:SI 3 ""))])] +(define_insn "adddi3" + [(set (match_operand:DI 0 "general_operand" "=&r,&ro,o,!&r,!o,!o") + (plus:DI (match_operand:DI 1 "general_operand" "%0,0,0iF,or,riF,o") + (match_operand:DI 2 "general_operand" "o,riF,or,or,oriF,o"))) + (clobber (match_scratch:SI 3 "=X,X,&r,X,&r,&r"))] "" - " -{ - if ((((rtx_equal_p (operands[0], operands[1]) - || rtx_equal_p (operands[0], operands[2])) - ? (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM - && GET_CODE (operands[2]) == MEM) - : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) - + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) - > N_ALLOCATABLE_REGISTERS) - { - if (GET_CODE (operands[0]) == REG) - { - gen_movdi (operands[0], operands[1]); - operands[1] = operands[0]; - } - else - { - rtx tmp = force_reg (DImode, operands[0]); - emit_insn (gen_adddi3 (tmp, operands[1], operands[2])); - emit_insn (gen_movdi (operands[0], tmp)); - DONE; - } - } -}") - -(define_insn "*adddi3_1" - [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,&ro,o,&r,o,o,o") - (plus:DI (match_operand:DI 1 "general_operand" "%0,0,0,or,riF,riF,o") - (match_operand:DI 2 "general_operand" "o,riF,o,oriF,riF,o,o"))) - (clobber (match_scratch:SI 3 "=X,X,&r,X,&r,&r,&r"))] - "(((rtx_equal_p (operands[0], operands[1]) - || rtx_equal_p (operands[0], operands[2])) - ? (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM - && GET_CODE (operands[2]) == MEM) - : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) - + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) - <= N_ALLOCATABLE_REGISTERS" "* { rtx low[3], high[3], xops[7], temp; @@ -3166,16 +3105,12 @@ ;;- subtract instructions -(define_insn "*subsidi3" - [(set (match_operand:DI 0 "general_operand" "=&r,ro,&r,o,o") - (minus:DI (match_operand:DI 1 "general_operand" "0,0,roiF,riF,o") - (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,roi,ri,ri")))) - (clobber (match_scratch:SI 3 "=X,X,X,X,&r"))] - "((rtx_equal_p (operands[0], operands[1]) ? 0 - : (N_REGS_USED (operands[0]) - + (GET_CODE (operands[0]) == MEM && GET_CODE (operands[1]) == MEM))) - + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) - <= N_ALLOCATABLE_REGISTERS" +(define_insn "subsidi3" + [(set (match_operand:DI 0 "general_operand" "=&r,&ro,&r,!&r,o,o,!o") + (minus:DI (match_operand:DI 1 "general_operand" "0iF,0,roiF,roiF,riF,o,o") + (zero_extend:DI (match_operand:SI 2 "general_operand" "o,ri,ri,o,ri,i,r")))) + (clobber (match_scratch:SI 3 "=X,X,X,X,X,&r,&r"))] + "" "* { rtx low[3], high[3], xops[7]; @@ -3218,43 +3153,12 @@ RET; }") -(define_expand "subdi3" - [(parallel [(set (match_operand:DI 0 "nonimmediate_operand" "") - (minus:DI (match_operand:DI 1 "general_operand" "") - (match_operand:DI 2 "general_operand" ""))) - (clobber (match_scratch:SI 3 ""))])] +(define_insn "subdi3" + [(set (match_operand:DI 0 "general_operand" "=&r,&ro,o,o,!&r,!o") + (minus:DI (match_operand:DI 1 "general_operand" "0,0,0iF,or,roiF,roiF") + (match_operand:DI 2 "general_operand" "or,riF,or,iF,roiF,roiF"))) + (clobber (match_scratch:SI 3 "=X,X,&r,&r,X,&r"))] "" - " -{ - if (((rtx_equal_p (operands[0], operands[1]) ? 0 - : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) - + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) - > N_ALLOCATABLE_REGISTERS) - { - if (GET_CODE (operands[0]) == REG) - { - gen_movdi (operands[0], operands[1]); - operands[1] = operands[0]; - } - else - { - rtx tmp = force_reg (DImode, operands[0]); - emit_insn (gen_subdi3 (tmp, operands[1], operands[2])); - emit_insn (gen_movdi (operands[0], tmp)); - DONE; - } - } -}") - -(define_insn "*subdi3_1" - [(set (match_operand:DI 0 "nonimmediate_operand" "=&r,&ro,&r,o,o") - (minus:DI (match_operand:DI 1 "general_operand" "0,0,roiF,riF,o") - (match_operand:DI 2 "general_operand" "o,riF,roiF,riF,o"))) - (clobber (match_scratch:SI 3 "=X,X,X,&r,&r"))] - "((rtx_equal_p (operands[0], operands[1]) ? 0 - : N_REGS_USED (operands[0]) + (GET_CODE (operands[0]) == MEM)) - + N_REGS_USED (operands[1]) + N_REGS_USED (operands[2])) - <= N_ALLOCATABLE_REGISTERS" "* { rtx low[3], high[3], xops[7]; @@ -4191,8 +4095,7 @@ ;; separately, making all shifts emit pairs of shift double and normal ;; shift. Since sh[lr]d does not shift more than 31 bits, and we wish to ;; support a 63 bit shift, each shift where the count is in a reg expands -;; to three pairs. If the overall shift is by N bits, then the first two -;; pairs shift by N / 2 and the last pair by N & 1. +;; to a pair of shifts, a branch, a shift by 32 and a label. ;; If the shift count is a constant, we need never emit more than one ;; shift pair, instead using moves and sign extension for counts greater @@ -4257,34 +4160,28 @@ (define_insn "ashldi3_non_const_int" [(set (match_operand:DI 0 "register_operand" "=&r") (ashift:DI (match_operand:DI 1 "register_operand" "0") - (match_operand:QI 2 "register_operand" "c"))) - (clobber (match_dup 2))] + (match_operand:QI 2 "register_operand" "c")))] "" "* { rtx xops[4], low[1], high[1]; + static HOST_WIDE_INT ashldi_label_number; CC_STATUS_INIT; split_di (operands, 1, low, high); xops[0] = operands[2]; - xops[1] = const1_rtx; + xops[1] = GEN_INT (32); xops[2] = low[0]; xops[3] = high[0]; - output_asm_insn (AS2 (ror%B0,%1,%0), xops); /* shift count / 2 */ - - output_asm_insn (AS3_SHIFT_DOUBLE (shld%L3,%0,%2,%3), xops); - output_asm_insn (AS2 (sal%L2,%0,%2), xops); - output_asm_insn (AS3_SHIFT_DOUBLE (shld%L3,%0,%2,%3), xops); - output_asm_insn (AS2 (sal%L2,%0,%2), xops); - - xops[1] = GEN_INT (7); /* shift count & 1 */ - - output_asm_insn (AS2 (shr%B0,%1,%0), xops); - output_asm_insn (AS3_SHIFT_DOUBLE (shld%L3,%0,%2,%3), xops); output_asm_insn (AS2 (sal%L2,%0,%2), xops); + output_asm_insn (AS2 (test%B0,%1,%b0), xops); + asm_fprintf (asm_out_file, \"\\tje %LLASHLDI%d\\n\", ashldi_label_number); + output_asm_insn (AS2 (mov%L3,%2,%3), xops); /* Fast shift by 32 */ + output_asm_insn (AS2 (xor%L2,%2,%2), xops); + asm_fprintf (asm_out_file, \"%LLASHLDI%d:\\n\", ashldi_label_number++); RET; }") @@ -4451,34 +4348,29 @@ (define_insn "ashrdi3_non_const_int" [(set (match_operand:DI 0 "register_operand" "=&r") (ashiftrt:DI (match_operand:DI 1 "register_operand" "0") - (match_operand:QI 2 "register_operand" "c"))) - (clobber (match_dup 2))] + (match_operand:QI 2 "register_operand" "c")))] "" "* { rtx xops[4], low[1], high[1]; + static HOST_WIDE_INT ashrdi_label_number; CC_STATUS_INIT; split_di (operands, 1, low, high); xops[0] = operands[2]; - xops[1] = const1_rtx; + xops[1] = GEN_INT (32); xops[2] = low[0]; xops[3] = high[0]; - output_asm_insn (AS2 (ror%B0,%1,%0), xops); /* shift count / 2 */ - - output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops); - output_asm_insn (AS2 (sar%L3,%0,%3), xops); - output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops); - output_asm_insn (AS2 (sar%L3,%0,%3), xops); - - xops[1] = GEN_INT (7); /* shift count & 1 */ - - output_asm_insn (AS2 (shr%B0,%1,%0), xops); - output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops); output_asm_insn (AS2 (sar%L3,%0,%3), xops); + output_asm_insn (AS2 (test%B0,%1,%b0), xops); + asm_fprintf (asm_out_file, \"\\tje %LLASHRDI%d\\n\", ashrdi_label_number); + xops[1] = GEN_INT (31); + output_asm_insn (AS2 (mov%L2,%3,%2), xops); + output_asm_insn (AS2 (sar%L3,%1,%3), xops); /* shift by 32 */ + asm_fprintf (asm_out_file, \"%LLASHRDI%d:\\n\", ashrdi_label_number++); RET; }") @@ -4611,34 +4503,28 @@ (define_insn "lshrdi3_non_const_int" [(set (match_operand:DI 0 "register_operand" "=&r") (lshiftrt:DI (match_operand:DI 1 "register_operand" "0") - (match_operand:QI 2 "register_operand" "c"))) - (clobber (match_dup 2))] + (match_operand:QI 2 "register_operand" "c")))] "" "* { rtx xops[4], low[1], high[1]; + static HOST_WIDE_INT lshrdi_label_number; CC_STATUS_INIT; split_di (operands, 1, low, high); xops[0] = operands[2]; - xops[1] = const1_rtx; + xops[1] = GEN_INT (32); xops[2] = low[0]; xops[3] = high[0]; - output_asm_insn (AS2 (ror%B0,%1,%0), xops); /* shift count / 2 */ - - output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops); - output_asm_insn (AS2 (shr%L3,%0,%3), xops); - output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops); - output_asm_insn (AS2 (shr%L3,%0,%3), xops); - - xops[1] = GEN_INT (7); /* shift count & 1 */ - - output_asm_insn (AS2 (shr%B0,%1,%0), xops); - output_asm_insn (AS3_SHIFT_DOUBLE (shrd%L2,%0,%3,%2), xops); output_asm_insn (AS2 (shr%L3,%0,%3), xops); + output_asm_insn (AS2 (test%B0,%1,%b0), xops); + asm_fprintf (asm_out_file, \"\\tje %LLLSHRDI%d\\n\", lshrdi_label_number); + output_asm_insn (AS2 (mov%L2,%3,%2), xops); /* Fast shift by 32 */ + output_asm_insn (AS2 (xor%L3,%3,%3), xops); + asm_fprintf (asm_out_file, \"%LLLSHRDI%d:\\n\", lshrdi_label_number++); RET; }") -- 2.30.2