From f5a23c4d1efb25ae915843122a9df1e7ac0c2c89 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 18 Jun 2022 22:46:59 +0100 Subject: [PATCH] add shortlist of Vector ISAs back into sv page --- openpower/sv.mdwn | 16 ++++++++++++++++ openpower/sv/vector_isa_comparison.mdwn | 10 +++++++--- 2 files changed, 23 insertions(+), 3 deletions(-) diff --git a/openpower/sv.mdwn b/openpower/sv.mdwn index 7779f1f78..4343cf76f 100644 --- a/openpower/sv.mdwn +++ b/openpower/sv.mdwn @@ -237,3 +237,19 @@ the heavy focus on VSX for the past 12 years has left the SFFS Level anaemic and out-of-date compared to ARM and x86. Approximately 100 additional Scalar Instructions are up for proposal** +# Other Scalable Vector ISAs + +* Original Cray ISA + +* NEC SX Aurora (still in production, inspired by Cray) + +* RISC-V RVV (inspired by Cray) + +* MRISC32 ISA Manual (under active development) + +* Mitch Alsup's MyISA 66000 Vector Processor ISA Manual is available from + Mitch on request. + +A comprehensive list of 3D GPU, Packed SIMD, Predicated-SIMD and true Scalable +Vector ISAs may be found at the [[sv/vector_isa_comparison]] page. +Note: AVX-512 and SVE2 are *not strict Vector ISAs*, they are Predicated-SIMD. diff --git a/openpower/sv/vector_isa_comparison.mdwn b/openpower/sv/vector_isa_comparison.mdwn index 67d1a675b..5d7988af3 100644 --- a/openpower/sv/vector_isa_comparison.mdwn +++ b/openpower/sv/vector_isa_comparison.mdwn @@ -69,11 +69,15 @@ well-known Packed SIMD ISAs. in AVX-512. * ARM NEON - accurately described as a Packed SIMD ISA in all literature. -* ARM SVE / SVE2 - accurately described as a Scalable Vector +* ARM SVE / SVE2 - partially accurately described as a Scalable Vector ISA, but the "Scaling" is, rather unfortunately, a parameter that is chosen by the *Hardware Architect*, rather than - the programmer. This has resulted in programmers writing - multiple variants of hand-coded assembler in order + the programmer. The actual "Scalar" part as far as the programmer + is concerned is supposed to be the Predicate Masks. However in + practice, ARM NEON programmers have found it too hard to adapt and + have instead attempted to fit the NEON SIMD paradigm on top of SVE. + This has resulted in programmers writing + **multiple variants** of near-identical hand-coded assembler in order to target different machines with different hardware widths, going directly against the advice given on ARM's developer documentation. -- 2.30.2