From f5a9a0bc22c4b717c2c32f4ddf283878d6c7ba93 Mon Sep 17 00:00:00 2001 From: Chris Wilson Date: Wed, 30 Mar 2011 10:54:31 +0100 Subject: [PATCH] Revert "intel: Add some defense against buffer allocation failure for subimage blits" This reverts commit de7678ef521f4fb34459e407a66ab8bf8be733e1. The conversion from using drm_intel_bo_alloc_tiled to a plain drm_intel_bo_alloc forgot that the tiled variant adjusts the allocation height even for TILING_NONE. Reported-by: Dave Airlie Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=35786 Signed-off-by: Chris Wilson --- .../drivers/dri/intel/intel_tex_subimage.c | 22 +++++++++---------- 1 file changed, 11 insertions(+), 11 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_tex_subimage.c b/src/mesa/drivers/dri/intel/intel_tex_subimage.c index d0f8294113a..6b7f13ff353 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_subimage.c +++ b/src/mesa/drivers/dri/intel/intel_tex_subimage.c @@ -90,19 +90,19 @@ intelTexSubimage(struct gl_context * ctx, intel->gen < 6 && target == GL_TEXTURE_2D && drm_intel_bo_busy(dst_bo)) { - dstRowStride = width * intelImage->mt->cpp; - temp_bo = drm_intel_bo_alloc(intel->bufmgr, "subimage blit bo", - dstRowStride * height, 0); - if (!temp_bo) - return; - - if (drm_intel_gem_bo_map_gtt(temp_bo)) { - drm_intel_bo_unreference(temp_bo); - return; - } - + unsigned long pitch; + uint32_t tiling_mode = I915_TILING_NONE; + temp_bo = drm_intel_bo_alloc_tiled(intel->bufmgr, + "subimage blit bo", + width, height, + intelImage->mt->cpp, + &tiling_mode, + &pitch, + 0); + drm_intel_gem_bo_map_gtt(temp_bo); texImage->Data = temp_bo->virtual; texImage->ImageOffsets[0] = 0; + dstRowStride = pitch; intel_miptree_get_image_offset(intelImage->mt, level, intelImage->face, 0, -- 2.30.2