From f63ffb74a7802a0b4d28914772ccbb8edc855760 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sat, 29 Jan 2022 14:32:23 +0000 Subject: [PATCH] use right offset in dcache wb address happened to be the same value but best to be safe, eh? --- src/soc/experiment/dcache.py | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/experiment/dcache.py b/src/soc/experiment/dcache.py index b7c059aa..2689a319 100644 --- a/src/soc/experiment/dcache.py +++ b/src/soc/experiment/dcache.py @@ -1463,7 +1463,7 @@ class DCache(Elaboratable): with m.Switch(r1.state): with m.Case(State.IDLE): - sync += r1.wb.adr.eq(req.real_addr[ROW_LINE_BITS:]) + sync += r1.wb.adr.eq(req.real_addr[ROW_OFF_BITS:]) sync += r1.wb.sel.eq(req.byte_sel) sync += r1.wb.dat.eq(req.data) sync += r1.dcbz.eq(req.dcbz) -- 2.30.2