From f66b107b56da1e03c2a33378b3bc3e0f66b640f8 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Sun, 14 Oct 2018 16:21:46 +0100 Subject: [PATCH] add category descriptions --- simple_v_extension/opcodes.mdwn | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/simple_v_extension/opcodes.mdwn b/simple_v_extension/opcodes.mdwn index 1e3cad0e4..e16d57ec2 100644 --- a/simple_v_extension/opcodes.mdwn +++ b/simple_v_extension/opcodes.mdwn @@ -36,9 +36,12 @@ see [[specification]] for full details. indirected) multi-register operation where the (optional) predication for the compare is taken from the destination register, and where (optionally) if the results of the multi-comparison are to be recorded, the **source** - register's predication target is used. On completion of all compares, - if the tests carried out succeeded (de-predicated compares not being included - in this assessment), the branch operation is carried out. + register's predication table entry is used as the means to specify + (in a bitfield format that is directly compatible for follow-up use as a + predicate) the register in which the comparison results are stored. + On completion of all compares, if the tests carried out succeeded + (de-predicated compares not being included in this assessment, evidently), + the branch operation is carried out. # RV32I/RV64I/RV128I "RV32I/RV64I/RV128I Base Integer Instruction Set" -- 2.30.2