From f67748038935e609aa85450b20d550b4813c9429 Mon Sep 17 00:00:00 2001 From: Eric Anholt Date: Wed, 16 Dec 2009 15:50:40 -0800 Subject: [PATCH] intel: Replace some gen3 IS_* checks with context structure usage. Shaves 400 bytes or so from i915_dri.so. --- src/mesa/drivers/dri/i915/i915_vtbl.c | 2 +- src/mesa/drivers/dri/i915/intel_tris.c | 4 ++-- src/mesa/drivers/dri/intel/intel_context.c | 10 +++++++--- src/mesa/drivers/dri/intel/intel_context.h | 1 + src/mesa/drivers/dri/intel/intel_extensions.c | 3 +-- src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 2 +- 6 files changed, 13 insertions(+), 9 deletions(-) diff --git a/src/mesa/drivers/dri/i915/i915_vtbl.c b/src/mesa/drivers/dri/i915/i915_vtbl.c index ba6be9796e1..9f7635a9538 100644 --- a/src/mesa/drivers/dri/i915/i915_vtbl.c +++ b/src/mesa/drivers/dri/i915/i915_vtbl.c @@ -611,7 +611,7 @@ i915_state_draw_region(struct intel_context *intel, * the value of this bit, the pipeline needs to be MI_FLUSHed. And it * can only be set when a depth buffer is already defined. */ - if (IS_945(intel->intelScreen->deviceID) && intel->use_early_z && + if (intel->is_945 && intel->use_early_z && depth_region->tiling != I915_TILING_NONE) value |= CLASSIC_EARLY_DEPTH; diff --git a/src/mesa/drivers/dri/i915/intel_tris.c b/src/mesa/drivers/dri/i915/intel_tris.c index 8a3ab39bc28..63c5ae96dc7 100644 --- a/src/mesa/drivers/dri/i915/intel_tris.c +++ b/src/mesa/drivers/dri/i915/intel_tris.c @@ -221,7 +221,7 @@ void intel_flush_prim(struct intel_context *intel) intel->prim.count = 0; offset = intel->prim.start_offset; intel->prim.start_offset = intel->prim.current_offset; - if (!IS_9XX(intel->intelScreen->deviceID)) + if (!intel->gen >= 3) intel->prim.start_offset = ALIGN(intel->prim.start_offset, 128); intel->prim.flush = NULL; @@ -251,7 +251,7 @@ void intel_flush_prim(struct intel_context *intel) intel->vertex_size * 4); #endif - if (IS_9XX(intel->intelScreen->deviceID)) { + if (intel->gen >= 3) { BEGIN_BATCH(5, LOOP_CLIPRECTS); OUT_BATCH(_3DSTATE_LOAD_STATE_IMMEDIATE_1 | I1_LOAD_S(0) | I1_LOAD_S(1) | 1); diff --git a/src/mesa/drivers/dri/intel/intel_context.c b/src/mesa/drivers/dri/intel/intel_context.c index 6f567dc4d05..02e0cc7b332 100644 --- a/src/mesa/drivers/dri/intel/intel_context.c +++ b/src/mesa/drivers/dri/intel/intel_context.c @@ -613,12 +613,16 @@ intelInitContext(struct intel_context *intel, intel->sarea = intelScreen->sarea; intel->driContext = driContextPriv; - if (IS_965(intel->intelScreen->deviceID)) + if (IS_965(intel->intelScreen->deviceID)) { intel->gen = 4; - else if (IS_9XX(intel->intelScreen->deviceID)) + } else if (IS_9XX(intel->intelScreen->deviceID)) { intel->gen = 3; - else + if (IS_945(intel->intelScreen->deviceID)) { + intel->is_945 = GL_TRUE; + } + } else { intel->gen = 2; + } if (IS_IGDNG(intel->intelScreen->deviceID)) { intel->is_ironlake = GL_TRUE; diff --git a/src/mesa/drivers/dri/intel/intel_context.h b/src/mesa/drivers/dri/intel/intel_context.h index e46764e99cf..e85886db82f 100644 --- a/src/mesa/drivers/dri/intel/intel_context.h +++ b/src/mesa/drivers/dri/intel/intel_context.h @@ -179,6 +179,7 @@ struct intel_context GLboolean needs_ff_sync; GLboolean is_ironlake; GLboolean is_g4x; + GLboolean is_945; GLboolean has_luminance_srgb; int urb_size; diff --git a/src/mesa/drivers/dri/intel/intel_extensions.c b/src/mesa/drivers/dri/intel/intel_extensions.c index bb50531d98f..5ac5ce10afb 100644 --- a/src/mesa/drivers/dri/intel/intel_extensions.c +++ b/src/mesa/drivers/dri/intel/intel_extensions.c @@ -199,8 +199,7 @@ intelInitExtensions(GLcontext *ctx) if (intel->gen >= 4) driInitExtensions(ctx, brw_extensions, GL_FALSE); - if (IS_915(intel->intelScreen->deviceID) - || IS_945(intel->intelScreen->deviceID)) { + if (intel->gen == 3) { driInitExtensions(ctx, i915_extensions, GL_FALSE); if (driQueryOptionb(&intel->optionCache, "fragment_shader")) diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index 6a565f80cf4..82e4150c6a9 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -87,7 +87,7 @@ intel_miptree_create_internal(struct intel_context *intel, mt->pitch = 0; #ifdef I915 - if (IS_945(intel->intelScreen->deviceID)) + if (intel->is_945) ok = i945_miptree_layout(intel, mt, tiling); else ok = i915_miptree_layout(intel, mt, tiling); -- 2.30.2