From f6af9c21fdff6cb6ec93ad2c74844e60e403fc1b Mon Sep 17 00:00:00 2001 From: Richard Earnshaw Date: Fri, 9 Aug 2019 16:14:59 +0000 Subject: [PATCH] [aarch64] PR target/91386 Use copy_rtx to avoid modifying original insns in peep2 pattern PR target/91386 is a situation where a peephole2 pattern substitution is discarded late because the selected instructions contain frame-related notes that we cannot redistribute (because the pattern has more than one insn in the output). Unfortunately, the original insns were being modified during the generation, so after the undo we are left with corrupt RTL. We avoid this by ensuring that the modifications are always made on a copy, so that the original insns are never changed. PR target/91386 * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Use copy_rtx to preserve the contents of the original insns. From-SVN: r274238 --- gcc/ChangeLog | 8 +++++++- gcc/config/aarch64/aarch64.c | 18 ++++++++++-------- 2 files changed, 17 insertions(+), 9 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index e19322b5a9e..de5a347d5a3 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,6 +1,12 @@ +2019-09-09 Richard Earnshaw + + PR target/91386 + * config/aarch64/aarch64.c (aarch64_gen_adjusted_ldpstp): Use copy_rtx + to preserve the contents of the original insns. + 2019-08-09 Richard Earnshaw - *confit/arm/arm.md (addsi3_compare_op1): Add 16-bit thumb-2 variants. + *config/arm/arm.md (addsi3_compare_op1): Add 16-bit thumb-2 variants. (addsi3_compare_op2): Likewise. 2019-08-09 Martin Liska diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index b99d5ec0e2b..48ec1ac5d5e 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -18546,19 +18546,21 @@ aarch64_gen_adjusted_ldpstp (rtx *operands, bool load, /* Sort the operands. */ qsort (temp_operands, 4, 2 * sizeof (rtx *), aarch64_ldrstr_offset_compare); + /* Copy the memory operands so that if we have to bail for some + reason the original addresses are unchanged. */ if (load) { - mem_1 = temp_operands[1]; - mem_2 = temp_operands[3]; - mem_3 = temp_operands[5]; - mem_4 = temp_operands[7]; + mem_1 = copy_rtx (temp_operands[1]); + mem_2 = copy_rtx (temp_operands[3]); + mem_3 = copy_rtx (temp_operands[5]); + mem_4 = copy_rtx (temp_operands[7]); } else { - mem_1 = temp_operands[0]; - mem_2 = temp_operands[2]; - mem_3 = temp_operands[4]; - mem_4 = temp_operands[6]; + mem_1 = copy_rtx (temp_operands[0]); + mem_2 = copy_rtx (temp_operands[2]); + mem_3 = copy_rtx (temp_operands[4]); + mem_4 = copy_rtx (temp_operands[6]); gcc_assert (code == UNKNOWN); } -- 2.30.2