From f70d27e03b2fd9557fcd184f52ee9c82128cc647 Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Thu, 21 May 2015 21:58:57 +0000 Subject: [PATCH] Allow indirect branch via GOT slot for x32 X32 doesn't support indirect branch via 32-bit memory slot since indirect branch will load 64-bit address from 64-bit memory slot. Since x32 GOT slot is 64-bit, we should allow indirect branch via GOT slot for x32. gcc/ PR target/66232 * config/i386/constraints.md (Bg): New constraint for GOT memory operand. * config/i386/i386.md (*call_got_x32): New pattern. (*call_value_got_x32): Likewise. * config/i386/predicates.md (GOT_memory_operand): New predicate. gcc/testsuite/ PR target/66232 * gcc.target/i386/pr66232-1.c: New test. * gcc.target/i386/pr66232-2.c: Likewise. * gcc.target/i386/pr66232-3.c: Likewise. * gcc.target/i386/pr66232-4.c: Likewise. * gcc.target/i386/pr66232-5.c: Likewise. From-SVN: r223505 --- gcc/ChangeLog | 9 +++++++++ gcc/config/i386/constraints.md | 5 +++++ gcc/config/i386/i386.md | 20 ++++++++++++++++++++ gcc/config/i386/predicates.md | 10 ++++++++++ gcc/testsuite/ChangeLog | 9 +++++++++ gcc/testsuite/gcc.target/i386/pr66232-1.c | 13 +++++++++++++ gcc/testsuite/gcc.target/i386/pr66232-2.c | 14 ++++++++++++++ gcc/testsuite/gcc.target/i386/pr66232-3.c | 13 +++++++++++++ gcc/testsuite/gcc.target/i386/pr66232-4.c | 13 +++++++++++++ gcc/testsuite/gcc.target/i386/pr66232-5.c | 16 ++++++++++++++++ 10 files changed, 122 insertions(+) create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-1.c create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-2.c create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-3.c create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-4.c create mode 100644 gcc/testsuite/gcc.target/i386/pr66232-5.c diff --git a/gcc/ChangeLog b/gcc/ChangeLog index a74a7ad8c2c..e5fa370ad4c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,12 @@ +2015-05-21 H.J. Lu + + PR target/66232 + * config/i386/constraints.md (Bg): New constraint for GOT memory + operand. + * config/i386/i386.md (*call_got_x32): New pattern. + (*call_value_got_x32): Likewise. + * config/i386/predicates.md (GOT_memory_operand): New predicate. + 2015-05-21 Jakub Jelinek PR tree-optimization/66233 diff --git a/gcc/config/i386/constraints.md b/gcc/config/i386/constraints.md index 2271bd168e7..c718bc10017 100644 --- a/gcc/config/i386/constraints.md +++ b/gcc/config/i386/constraints.md @@ -146,10 +146,15 @@ "@internal Lower SSE register when avoiding REX prefix and all SSE registers otherwise.") ;; We use the B prefix to denote any number of internal operands: +;; g GOT memory operand. ;; s Sibcall memory operand, not valid for TARGET_X32 ;; w Call memory operand, not valid for TARGET_X32 ;; z Constant call address operand. +(define_constraint "Bg" + "@internal GOT memory operand." + (match_operand 0 "GOT_memory_operand")) + (define_constraint "Bs" "@internal Sibcall memory operand." (and (not (match_test "TARGET_X32")) diff --git a/gcc/config/i386/i386.md b/gcc/config/i386/i386.md index aefca43c450..3819dfdcd5c 100644 --- a/gcc/config/i386/i386.md +++ b/gcc/config/i386/i386.md @@ -11659,6 +11659,15 @@ "* return ix86_output_call_insn (insn, operands[0]);" [(set_attr "type" "call")]) +;; This covers both call and sibcall since only GOT slot is allowed. +(define_insn "*call_got_x32" + [(call (mem:QI (zero_extend:DI + (match_operand:SI 0 "GOT_memory_operand" "Bg"))) + (match_operand 1))] + "TARGET_X32" + "* return ix86_output_call_insn (insn, operands[0]);" + [(set_attr "type" "call")]) + (define_insn "*sibcall" [(call (mem:QI (match_operand:W 0 "sibcall_insn_operand" "UBsBz")) (match_operand 1))] @@ -11825,6 +11834,17 @@ "* return ix86_output_call_insn (insn, operands[1]);" [(set_attr "type" "callv")]) +;; This covers both call and sibcall since only GOT slot is allowed. +(define_insn "*call_value_got_x32" + [(set (match_operand 0) + (call (mem:QI + (zero_extend:DI + (match_operand:SI 1 "GOT_memory_operand" "Bg"))) + (match_operand 2)))] + "TARGET_X32" + "* return ix86_output_call_insn (insn, operands[1]);" + [(set_attr "type" "callv")]) + (define_insn "*sibcall_value" [(set (match_operand 0) (call (mem:QI (match_operand:W 1 "sibcall_insn_operand" "UBsBz")) diff --git a/gcc/config/i386/predicates.md b/gcc/config/i386/predicates.md index 26dd3e1d7f8..b7bb84fe0ee 100644 --- a/gcc/config/i386/predicates.md +++ b/gcc/config/i386/predicates.md @@ -606,6 +606,16 @@ (and (not (match_test "TARGET_X32")) (match_operand 0 "sibcall_memory_operand")))) +;; Return true if OP is a GOT memory operand. +(define_predicate "GOT_memory_operand" + (match_operand 0 "memory_operand") +{ + op = XEXP (op, 0); + return (GET_CODE (op) == CONST + && GET_CODE (XEXP (op, 0)) == UNSPEC + && XINT (XEXP (op, 0), 1) == UNSPEC_GOTPCREL); +}) + ;; Match exactly zero. (define_predicate "const0_operand" (match_code "const_int,const_wide_int,const_double,const_vector") diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index bd4e57e0367..a2d8133a7f2 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,12 @@ +2015-05-21 H.J. Lu + + PR target/66232 + * gcc.target/i386/pr66232-1.c: New test. + * gcc.target/i386/pr66232-2.c: Likewise. + * gcc.target/i386/pr66232-3.c: Likewise. + * gcc.target/i386/pr66232-4.c: Likewise. + * gcc.target/i386/pr66232-5.c: Likewise. + 2015-05-21 Nathan Sidwell * g++.dg/cpp1y/pr60943.C: New. diff --git a/gcc/testsuite/gcc.target/i386/pr66232-1.c b/gcc/testsuite/gcc.target/i386/pr66232-1.c new file mode 100644 index 00000000000..ba4a5ef5467 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66232-1.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt" } */ + +extern void bar (void); + +void +foo (void) +{ + bar (); +} + +/* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr66232-2.c b/gcc/testsuite/gcc.target/i386/pr66232-2.c new file mode 100644 index 00000000000..f05d7c557a5 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66232-2.c @@ -0,0 +1,14 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt" } */ + +extern void bar (void); + +int +foo (void) +{ + bar (); + return 0; +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr66232-3.c b/gcc/testsuite/gcc.target/i386/pr66232-3.c new file mode 100644 index 00000000000..ee3176cac68 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66232-3.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt" } */ + +extern int bar (void); + +int +foo (void) +{ + return bar (); +} + +/* { dg-final { scan-assembler "jmp\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr66232-4.c b/gcc/testsuite/gcc.target/i386/pr66232-4.c new file mode 100644 index 00000000000..5fa0dedf67e --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66232-4.c @@ -0,0 +1,13 @@ +/* { dg-do compile { target *-*-linux* } } */ +/* { dg-options "-O2 -fpic -fno-plt" } */ + +extern int bar (void); + +int +foo (void) +{ + return bar () + 1; +} + +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOTPCREL" { target { ! ia32 } } } } */ +/* { dg-final { scan-assembler "call\[ \t\]*.bar@GOT\\(" { target ia32 } } } */ diff --git a/gcc/testsuite/gcc.target/i386/pr66232-5.c b/gcc/testsuite/gcc.target/i386/pr66232-5.c new file mode 100644 index 00000000000..c01671767a8 --- /dev/null +++ b/gcc/testsuite/gcc.target/i386/pr66232-5.c @@ -0,0 +1,16 @@ +/* { dg-do compile { target { ! { ia32 } } } } */ +/* { dg-require-effective-target maybe_x32 } */ +/* { dg-options "-O2 -fpic -mx32" } */ + +extern void (*bar) (void); +void +foo (int n) +{ + int i; + for (i = 0; i < n; i++) + { + if (!bar) + continue; + (*bar) (); + } +} -- 2.30.2