From f73dc006049cd217fdd2fa943b861ad9f517aa66 Mon Sep 17 00:00:00 2001 From: Wilco Dijkstra Date: Fri, 25 Jan 2019 13:29:06 +0000 Subject: [PATCH] [PATCH][AArch64] Fix generation of tst (PR87763) The TST instruction no longer matches in all cases due to changes in Combine. The fix is simple, we now need to allow a subreg as well when selecting the cc_mode. This fixes the tst_5.c and tst_6.c failures. AArch64 regress & bootstrap OK. PR rtl-optimization/87763 * config/aarch64/aarch64.c (aarch64_select_cc_mode): Allow SUBREG when matching CC_NZmode compare. From-SVN: r268265 --- gcc/ChangeLog | 6 ++++++ gcc/config/aarch64/aarch64.c | 2 +- 2 files changed, 7 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index cc4f4413f14..87794469c3b 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2019-01-25 Wilco Dijkstra + + PR rtl-optimization/87763 + * config/aarch64/aarch64.c (aarch64_select_cc_mode): + Allow SUBREG when matching CC_NZmode compare. + 2019-01-25 Richard Biener PR tree-optimization/89049 diff --git a/gcc/config/aarch64/aarch64.c b/gcc/config/aarch64/aarch64.c index 5df5a8b7843..8bddff9029b 100644 --- a/gcc/config/aarch64/aarch64.c +++ b/gcc/config/aarch64/aarch64.c @@ -7163,7 +7163,7 @@ aarch64_select_cc_mode (RTX_CODE code, rtx x, rtx y) /* Equality comparisons of short modes against zero can be performed using the TST instruction with the appropriate bitmask. */ - if (y == const0_rtx && REG_P (x) + if (y == const0_rtx && (REG_P (x) || SUBREG_P (x)) && (code == EQ || code == NE) && (mode_x == HImode || mode_x == QImode)) return CC_NZmode; -- 2.30.2