From f78c2209532f9943c5b3aab7464a5e54ae2a2bc0 Mon Sep 17 00:00:00 2001 From: Segher Boessenkool Date: Wed, 5 Jun 2019 01:33:18 +0200 Subject: [PATCH] rs6000: VSa->wa for some more cases * config/rs6000/vsx.md (vsx_): Use wa instead of . (vsx_extract__var): Ditto. From-SVN: r271934 --- gcc/ChangeLog | 5 +++++ gcc/config/rs6000/vsx.md | 6 +++--- 2 files changed, 8 insertions(+), 3 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 213132f83f9..55463f0416c 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2019-06-04 Segher Boessenkool + + * config/rs6000/vsx.md (vsx_): Use wa instead of . + (vsx_extract__var): Ditto. + 2019-06-04 Segher Boessenkool * config/rs6000/vsx.md: Replace all that are used with VSX_TI diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md index 625582373f3..519f1a01ce2 100644 --- a/gcc/config/rs6000/vsx.md +++ b/gcc/config/rs6000/vsx.md @@ -2164,8 +2164,8 @@ ;; scalar single precision instructions internally use the double format. ;; Prefer the altivec registers, since we likely will need to do a vperm (define_insn "vsx_" - [(set (match_operand: 0 "vsx_register_operand" "=,?") - (unspec: [(match_operand:VSX_SPDP 1 "vsx_register_operand" ",")] + [(set (match_operand: 0 "vsx_register_operand" "=,?wa") + (unspec: [(match_operand:VSX_SPDP 1 "vsx_register_operand" ",wa")] UNSPEC_VSX_CVSPDP))] "VECTOR_UNIT_VSX_P (mode)" " %x0,%x1" @@ -3269,7 +3269,7 @@ ;; Variable V2DI/V2DF extract (define_insn_and_split "vsx_extract__var" - [(set (match_operand: 0 "gpc_reg_operand" "=v,,r") + [(set (match_operand: 0 "gpc_reg_operand" "=v,wa,r") (unspec: [(match_operand:VSX_D 1 "input_operand" "v,m,m") (match_operand:DI 2 "gpc_reg_operand" "r,r,r")] UNSPEC_VSX_EXTRACT)) -- 2.30.2