From f79fe06f4d803a294ec182cc61972c7d706ede70 Mon Sep 17 00:00:00 2001 From: Ilya Enkovich Date: Tue, 10 Nov 2015 12:15:42 +0000 Subject: [PATCH] i386-protos.h (ix86_expand_sse_movcc): New. gcc/ 2015-11-10 Ilya Enkovich * config/i386/i386-protos.h (ix86_expand_sse_movcc): New. * config/i386/i386.c (ix86_expand_sse_movcc): Make public. Cast mask to FP mode if required. * config/i386/sse.md (vcond_mask_): New. (vcond_mask_): New. (vcond_mask_): New. (vcond_mask_): New. (vcond_mask_v2div2di): New. (vcond_mask_): New. (vcond_mask_): New. From-SVN: r230102 --- gcc/ChangeLog | 13 ++++++ gcc/config/i386/i386-protos.h | 1 + gcc/config/i386/i386.c | 2 +- gcc/config/i386/sse.md | 81 +++++++++++++++++++++++++++++++++++ 4 files changed, 96 insertions(+), 1 deletion(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 7b740a79430..ade9a3b5832 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,16 @@ +2015-11-10 Ilya Enkovich + + * config/i386/i386-protos.h (ix86_expand_sse_movcc): New. + * config/i386/i386.c (ix86_expand_sse_movcc): Make public. + Cast mask to FP mode if required. + * config/i386/sse.md (vcond_mask_): New. + (vcond_mask_): New. + (vcond_mask_): New. + (vcond_mask_): New. + (vcond_mask_v2div2di): New. + (vcond_mask_): New. + (vcond_mask_): New. + 2015-11-10 Ilya Enkovich * optabs-query.h (get_vcond_mask_icode): New. diff --git a/gcc/config/i386/i386-protos.h b/gcc/config/i386/i386-protos.h index 9e20714099d..bd084dc9714 100644 --- a/gcc/config/i386/i386-protos.h +++ b/gcc/config/i386/i386-protos.h @@ -132,6 +132,7 @@ extern bool ix86_expand_vec_perm_const (rtx[]); extern bool ix86_expand_mask_vec_cmp (rtx[]); extern bool ix86_expand_int_vec_cmp (rtx[]); extern bool ix86_expand_fp_vec_cmp (rtx[]); +extern void ix86_expand_sse_movcc (rtx, rtx, rtx, rtx); extern void ix86_expand_sse_unpack (rtx, rtx, bool, bool); extern bool ix86_expand_int_addcc (rtx[]); extern rtx ix86_expand_call (rtx, rtx, rtx, rtx, rtx, bool); diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index f6c17dfd405..b84a11d433f 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -22633,7 +22633,7 @@ ix86_expand_sse_cmp (rtx dest, enum rtx_code code, rtx cmp_op0, rtx cmp_op1, /* Expand DEST = CMP ? OP_TRUE : OP_FALSE into a sequence of logical operations. This is used for both scalar and vector conditional moves. */ -static void +void ix86_expand_sse_movcc (rtx dest, rtx cmp, rtx op_true, rtx op_false) { machine_mode mode = GET_MODE (dest); diff --git a/gcc/config/i386/sse.md b/gcc/config/i386/sse.md index f804255aedf..452629fa0ca 100644 --- a/gcc/config/i386/sse.md +++ b/gcc/config/i386/sse.md @@ -3015,6 +3015,87 @@ DONE; }) +(define_expand "vcond_mask_" + [(set (match_operand:V48_AVX512VL 0 "register_operand") + (vec_merge:V48_AVX512VL + (match_operand:V48_AVX512VL 1 "nonimmediate_operand") + (match_operand:V48_AVX512VL 2 "vector_move_operand") + (match_operand: 3 "register_operand")))] + "TARGET_AVX512F") + +(define_expand "vcond_mask_" + [(set (match_operand:VI12_AVX512VL 0 "register_operand") + (vec_merge:VI12_AVX512VL + (match_operand:VI12_AVX512VL 1 "nonimmediate_operand") + (match_operand:VI12_AVX512VL 2 "vector_move_operand") + (match_operand: 3 "register_operand")))] + "TARGET_AVX512BW") + +(define_expand "vcond_mask_" + [(set (match_operand:VI_256 0 "register_operand") + (vec_merge:VI_256 + (match_operand:VI_256 1 "nonimmediate_operand") + (match_operand:VI_256 2 "vector_move_operand") + (match_operand: 3 "register_operand")))] + "TARGET_AVX2" +{ + ix86_expand_sse_movcc (operands[0], operands[3], + operands[1], operands[2]); + DONE; +}) + +(define_expand "vcond_mask_" + [(set (match_operand:VI124_128 0 "register_operand") + (vec_merge:VI124_128 + (match_operand:VI124_128 1 "nonimmediate_operand") + (match_operand:VI124_128 2 "vector_move_operand") + (match_operand: 3 "register_operand")))] + "TARGET_SSE2" +{ + ix86_expand_sse_movcc (operands[0], operands[3], + operands[1], operands[2]); + DONE; +}) + +(define_expand "vcond_mask_v2div2di" + [(set (match_operand:V2DI 0 "register_operand") + (vec_merge:V2DI + (match_operand:V2DI 1 "nonimmediate_operand") + (match_operand:V2DI 2 "vector_move_operand") + (match_operand:V2DI 3 "register_operand")))] + "TARGET_SSE4_2" +{ + ix86_expand_sse_movcc (operands[0], operands[3], + operands[1], operands[2]); + DONE; +}) + +(define_expand "vcond_mask_" + [(set (match_operand:VF_256 0 "register_operand") + (vec_merge:VF_256 + (match_operand:VF_256 1 "nonimmediate_operand") + (match_operand:VF_256 2 "vector_move_operand") + (match_operand: 3 "register_operand")))] + "TARGET_AVX" +{ + ix86_expand_sse_movcc (operands[0], operands[3], + operands[1], operands[2]); + DONE; +}) + +(define_expand "vcond_mask_" + [(set (match_operand:VF_128 0 "register_operand") + (vec_merge:VF_128 + (match_operand:VF_128 1 "nonimmediate_operand") + (match_operand:VF_128 2 "vector_move_operand") + (match_operand: 3 "register_operand")))] + "TARGET_SSE" +{ + ix86_expand_sse_movcc (operands[0], operands[3], + operands[1], operands[2]); + DONE; +}) + ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; ;; ;; Parallel floating point logical operations -- 2.30.2