From f7a75d872b4bf94aafcfcb5f773afda75f7c3499 Mon Sep 17 00:00:00 2001 From: Korey Sewell Date: Fri, 3 Feb 2006 03:38:27 -0500 Subject: [PATCH] Checkin (Merge?) files ... Added a few new format files arch/mips/isa/formats/fpop.format: Floating Point Formats arch/mips/isa/formats/tlb.format: TLB Ops Format arch/mips/isa/mips.isa: Name change to mips.isa --HG-- rename : arch/mips/isa_desc/bitfields.h => arch/mips/isa/bitfields.h rename : arch/mips/isa_desc/decoder.h => arch/mips/isa/decoder.h rename : arch/mips/isa_desc/formats.h => arch/mips/isa/formats.h rename : arch/mips/isa_desc/formats/basic.format => arch/mips/isa/formats/basic.format rename : arch/mips/isa_desc/formats/branch.format => arch/mips/isa/formats/branch.format rename : arch/mips/isa_desc/formats/integerop.format => arch/mips/isa/formats/integerop.format rename : arch/mips/isa_desc/formats/mem.format => arch/mips/isa/formats/mem.format rename : arch/mips/isa_desc/formats/noop.format => arch/mips/isa/formats/noop.format rename : arch/mips/isa_desc/formats/trap.format => arch/mips/isa/formats/trap.format rename : arch/mips/isa_desc/includes.h => arch/mips/isa/includes.h rename : arch/mips/isa_desc/operands.h => arch/mips/isa/operands.h extra : convert_revision : 069a24da405b613f688e693fd038ac7a30a4faed --- arch/mips/{isa_desc => isa}/bitfields.h | 0 arch/mips/{isa_desc => isa}/decoder.h | 0 arch/mips/{isa_desc => isa}/formats.h | 0 .../{isa_desc => isa}/formats/basic.format | 0 .../{isa_desc => isa}/formats/branch.format | 0 arch/mips/isa/formats/fpop.format | 110 ++++++++++++++++++ .../formats/integerop.format | 0 .../mips/{isa_desc => isa}/formats/mem.format | 0 .../{isa_desc => isa}/formats/noop.format | 0 arch/mips/isa/formats/tlb.format | 53 +++++++++ .../{isa_desc => isa}/formats/trap.format | 0 arch/mips/{isa_desc => isa}/includes.h | 0 arch/mips/isa/mips.isa | 52 +++++++++ arch/mips/{isa_desc => isa}/operands.h | 0 14 files changed, 215 insertions(+) rename arch/mips/{isa_desc => isa}/bitfields.h (100%) rename arch/mips/{isa_desc => isa}/decoder.h (100%) rename arch/mips/{isa_desc => isa}/formats.h (100%) rename arch/mips/{isa_desc => isa}/formats/basic.format (100%) rename arch/mips/{isa_desc => isa}/formats/branch.format (100%) create mode 100644 arch/mips/isa/formats/fpop.format rename arch/mips/{isa_desc => isa}/formats/integerop.format (100%) rename arch/mips/{isa_desc => isa}/formats/mem.format (100%) rename arch/mips/{isa_desc => isa}/formats/noop.format (100%) create mode 100644 arch/mips/isa/formats/tlb.format rename arch/mips/{isa_desc => isa}/formats/trap.format (100%) rename arch/mips/{isa_desc => isa}/includes.h (100%) create mode 100644 arch/mips/isa/mips.isa rename arch/mips/{isa_desc => isa}/operands.h (100%) diff --git a/arch/mips/isa_desc/bitfields.h b/arch/mips/isa/bitfields.h similarity index 100% rename from arch/mips/isa_desc/bitfields.h rename to arch/mips/isa/bitfields.h diff --git a/arch/mips/isa_desc/decoder.h b/arch/mips/isa/decoder.h similarity index 100% rename from arch/mips/isa_desc/decoder.h rename to arch/mips/isa/decoder.h diff --git a/arch/mips/isa_desc/formats.h b/arch/mips/isa/formats.h similarity index 100% rename from arch/mips/isa_desc/formats.h rename to arch/mips/isa/formats.h diff --git a/arch/mips/isa_desc/formats/basic.format b/arch/mips/isa/formats/basic.format similarity index 100% rename from arch/mips/isa_desc/formats/basic.format rename to arch/mips/isa/formats/basic.format diff --git a/arch/mips/isa_desc/formats/branch.format b/arch/mips/isa/formats/branch.format similarity index 100% rename from arch/mips/isa_desc/formats/branch.format rename to arch/mips/isa/formats/branch.format diff --git a/arch/mips/isa/formats/fpop.format b/arch/mips/isa/formats/fpop.format new file mode 100644 index 000000000..a058eea19 --- /dev/null +++ b/arch/mips/isa/formats/fpop.format @@ -0,0 +1,110 @@ +//////////////////////////////////////////////////////////////////// +// +// Floating Point operate instructions +// + +output header {{ + /** + * Base class for integer operations. + */ + class FPOp : public MipsStaticInst + { + protected: + + /// Constructor + FPOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass) + { + } + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; + }; +}}; + +output decoder {{ + std::string FPOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const + { + return "Disassembly of integer instruction\n"; + } +}}; + +def template IntegerExecute {{ + Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + { + //These are set to constants when the execute method + //is generated + bool useCc = ; + bool checkPriv = ; + + //Attempt to execute the instruction + try + { + checkPriv; + + %(op_decl)s; + %(op_rd)s; + %(code)s; + } + //If we have an exception for some reason, + //deal with it + catch(MipsException except) + { + //Deal with exception + return No_Fault; + } + + //Write the resulting state to the execution context + %(op_wb)s; + if(useCc) + { + xc->regs.miscRegFile.ccrFields.iccFields.n = Rd & (1 << 63); + xc->regs.miscRegFile.ccrFields.iccFields.z = (Rd == 0); + xc->regs.miscRegFile.ccrFields.iccFields.v = ivValue; + xc->regs.miscRegFile.ccrFields.iccFields.c = icValue; + xc->regs.miscRegFile.ccrFields.xccFields.n = Rd & (1 << 31); + xc->regs.miscRegFile.ccrFields.xccFields.z = ((Rd & 0xFFFFFFFF) == 0); + xc->regs.miscRegFile.ccrFields.xccFields.v = xvValue; + xc->regs.miscRegFile.ccrFields.xccFields.c = xcValue; + } + return No_Fault; + } +}}; + +// Primary format for integer operate instructions: +def format FPOp(code, *opt_flags) {{ + orig_code = code + cblk = CodeBlock(code) + checkPriv = (code.find('checkPriv') != -1) + code.replace('checkPriv', '') + if checkPriv: + code.replace('checkPriv;', 'if(!xc->regs.miscRegFile.pstateFields.priv) throw privileged_opcode;') + else: + code.replace('checkPriv;', '') + for (marker, value) in (('ivValue', '0'), ('icValue', '0'), + ('xvValue', '0'), ('xcValue', '0')): + code.replace(marker, value) + iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags) + header_output = BasicDeclare.subst(iop) + decoder_output = BasicConstructor.subst(iop) + decode_block = BasicDecodeWithMnemonic.subst(iop) + exec_output = IntegerExecute.subst(iop) +}}; + +// Primary format for integer operate instructions: +def format FPOpCc(code, icValue, ivValue, xcValue, xvValue, *opt_flags) {{ + orig_code = code + cblk = CodeBlock(code) + checkPriv = (code.find('checkPriv') != -1) + code.replace('checkPriv', '') + if checkPriv: + code.replace('checkPriv;', 'if(!xc->regs.miscRegFile.pstateFields.priv) throw privileged_opcode;') + else: + code.replace('checkPriv;', '') + for (marker, value) in (('ivValue', ivValue), ('icValue', icValue), + ('xvValue', xvValue), ('xcValue', xcValue)): + code.replace(marker, value) + iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags) + header_output = BasicDeclare.subst(iop) + decoder_output = BasicConstructor.subst(iop) + decode_block = BasicDecodeWithMnemonic.subst(iop) + exec_output = IntegerExecute.subst(iop) +}}; diff --git a/arch/mips/isa_desc/formats/integerop.format b/arch/mips/isa/formats/integerop.format similarity index 100% rename from arch/mips/isa_desc/formats/integerop.format rename to arch/mips/isa/formats/integerop.format diff --git a/arch/mips/isa_desc/formats/mem.format b/arch/mips/isa/formats/mem.format similarity index 100% rename from arch/mips/isa_desc/formats/mem.format rename to arch/mips/isa/formats/mem.format diff --git a/arch/mips/isa_desc/formats/noop.format b/arch/mips/isa/formats/noop.format similarity index 100% rename from arch/mips/isa_desc/formats/noop.format rename to arch/mips/isa/formats/noop.format diff --git a/arch/mips/isa/formats/tlb.format b/arch/mips/isa/formats/tlb.format new file mode 100644 index 000000000..f5e4076f2 --- /dev/null +++ b/arch/mips/isa/formats/tlb.format @@ -0,0 +1,53 @@ +//////////////////////////////////////////////////////////////////// +// +// TlbOp instructions +// + +output header {{ + /** + * Base class for integer operations. + */ + class TlbOp : public MipsStaticInst + { + protected: + + /// Constructor + TlbOp(const char *mnem, MachInst _machInst, OpClass __opClass) : MipsStaticInst(mnem, _machInst, __opClass) + { + } + + std::string generateDisassembly(Addr pc, const SymbolTable *symtab) const; + }; +}}; + +output decoder {{ + std::string TlbOp::generateDisassembly(Addr pc, const SymbolTable *symtab) const + { + return "Disassembly of integer instruction\n"; + } +}}; + +def template TlbOpExecute {{ + Fault %(class_name)s::execute(%(CPU_exec_context)s *xc, Trace::InstRecord *traceData) const + { + //Call into the trap handler with the appropriate fault + return No_Fault; + } + + //Write the resulting state to the execution context + %(op_wb)s; + + return No_Fault; + } +}}; + +// Primary format for integer operate instructions: +def format TlbOp(code, *opt_flags) {{ + orig_code = code + cblk = CodeBlock(code) + iop = InstObjParams(name, Name, 'MipsStaticInst', cblk, opt_flags) + header_output = BasicDeclare.subst(iop) + decoder_output = BasicConstructor.subst(iop) + decode_block = BasicDecodeWithMnemonic.subst(iop) + exec_output = TlbOpExecute.subst(iop) +}}; diff --git a/arch/mips/isa_desc/formats/trap.format b/arch/mips/isa/formats/trap.format similarity index 100% rename from arch/mips/isa_desc/formats/trap.format rename to arch/mips/isa/formats/trap.format diff --git a/arch/mips/isa_desc/includes.h b/arch/mips/isa/includes.h similarity index 100% rename from arch/mips/isa_desc/includes.h rename to arch/mips/isa/includes.h diff --git a/arch/mips/isa/mips.isa b/arch/mips/isa/mips.isa new file mode 100644 index 000000000..a8c71872b --- /dev/null +++ b/arch/mips/isa/mips.isa @@ -0,0 +1,52 @@ +// -*- mode:c++ -*- + +// Copyright (c) 2003-2005 The Regents of The University of Michigan +// All rights reserved. +// +// Redistribution and use in source and binary forms, with or without +// modification, are permitted provided that the following conditions are +// met: redistributions of source code must retain the above copyright +// notice, this list of conditions and the following disclaimer; +// redistributions in binary form must reproduce the above copyright +// notice, this list of conditions and the following disclaimer in the +// documentation and/or other materials provided with the distribution; +// neither the name of the copyright holders nor the names of its +// contributors may be used to endorse or promote products derived from +// this software without specific prior written permission. +// +// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS +// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT +// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR +// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT +// OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, +// SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT +// LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, +// DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY +// THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT +// (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE +// OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. + +##include "m5/arch/sparc/isa_desc/includes.h" + +//////////////////////////////////////////////////////////////////// +// +// Namespace statement. Everything below this line will be in the +// MipsISAInst namespace. +// + +namespace MipsISA; + +//Include the bitfield definitions +##include "m5/arch/mips/isa_desc/bitfields.h" + +//Include the operand_types and operand definitions +##include "m5/arch/mips/isa_desc/operands.h" + +//Include the base class for mips instructions, and some support code +##include "m5/arch/mips/isa_desc/base.h" + +//Include the definitions for the instruction formats +##include "m5/arch/mips/isa_desc/formats.h" + +//Include the decoder definition +##include "m5/arch/mips/isa_desc/decoder.h" diff --git a/arch/mips/isa_desc/operands.h b/arch/mips/isa/operands.h similarity index 100% rename from arch/mips/isa_desc/operands.h rename to arch/mips/isa/operands.h -- 2.30.2