From f8377b411dfe3c879eaab11bb86f509178796bd1 Mon Sep 17 00:00:00 2001 From: Chad Versace Date: Thu, 22 Sep 2011 13:04:18 -0700 Subject: [PATCH] intel: Add 'mode' param to intel_region_map The 'mode' param is a bitset of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT. A future commit will perform buffer resolves in intel_region_map(). So, even though the access mode is irrelevant to the GTT, the extra information allows us to intelligently avoid unneccessary buffer resolves. Signed-off-by: Chad Versace --- src/mesa/drivers/dri/intel/intel_mipmap_tree.c | 6 +++--- src/mesa/drivers/dri/intel/intel_regions.c | 3 ++- src/mesa/drivers/dri/intel/intel_regions.h | 8 ++++++-- src/mesa/drivers/dri/intel/intel_span.c | 6 ++++-- src/mesa/drivers/dri/intel/intel_tex.c | 3 ++- src/mesa/drivers/dri/intel/intel_tex.h | 6 ++++-- .../drivers/dri/intel/intel_tex_validate.c | 18 +++++++++++++----- 7 files changed, 34 insertions(+), 16 deletions(-) diff --git a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c index d96e751fb21..bf6a0f6b71e 100644 --- a/src/mesa/drivers/dri/intel/intel_mipmap_tree.c +++ b/src/mesa/drivers/dri/intel/intel_mipmap_tree.c @@ -395,8 +395,8 @@ intel_miptree_copy_teximage(struct intel_context *intel, fallback_debug("miptree validate blit for %s failed\n", _mesa_get_format_name(intelImage->base.Base.TexFormat)); - dst = intel_region_map(intel, dst_mt->region); - src = intel_region_map(intel, src_mt->region); + dst = intel_region_map(intel, dst_mt->region, GL_MAP_WRITE_BIT); + src = intel_region_map(intel, src_mt->region, GL_MAP_READ_BIT); _mesa_copy_rect(dst, dst_mt->cpp, @@ -410,7 +410,7 @@ intel_miptree_copy_teximage(struct intel_context *intel, intel_region_unmap(intel, src_mt->region); } } else { - dst = intel_region_map(intel, dst_mt->region); + dst = intel_region_map(intel, dst_mt->region, GL_MAP_WRITE_BIT); DBG("validate upload mt %p -> mt %p %d,%d/%d (%dx%d)\n", src, diff --git a/src/mesa/drivers/dri/intel/intel_regions.c b/src/mesa/drivers/dri/intel/intel_regions.c index 5518b3b82e5..0b9ffe87a6b 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.c +++ b/src/mesa/drivers/dri/intel/intel_regions.c @@ -109,7 +109,8 @@ debug_backtrace(void) /* XXX: Thread safety? */ GLubyte * -intel_region_map(struct intel_context *intel, struct intel_region *region) +intel_region_map(struct intel_context *intel, struct intel_region *region, + GLbitfield mode) { /* We have the region->map_refcount controlling mapping of the BO because * in software fallbacks we may end up mapping the same buffer multiple diff --git a/src/mesa/drivers/dri/intel/intel_regions.h b/src/mesa/drivers/dri/intel/intel_regions.h index 78309d2a90b..06e76acde29 100644 --- a/src/mesa/drivers/dri/intel/intel_regions.h +++ b/src/mesa/drivers/dri/intel/intel_regions.h @@ -95,10 +95,14 @@ void intel_region_release(struct intel_region **ib); void intel_recreate_static_regions(struct intel_context *intel); -/* Map/unmap regions. This is refcounted also: +/** + * Map/unmap regions. This is refcounted also: + * + * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT */ GLubyte *intel_region_map(struct intel_context *intel, - struct intel_region *ib); + struct intel_region *ib, + GLbitfield mode); void intel_region_unmap(struct intel_context *intel, struct intel_region *ib); diff --git a/src/mesa/drivers/dri/intel/intel_span.c b/src/mesa/drivers/dri/intel/intel_span.c index 8da3b117f3e..bdc4a0e158c 100644 --- a/src/mesa/drivers/dri/intel/intel_span.c +++ b/src/mesa/drivers/dri/intel/intel_span.c @@ -321,7 +321,8 @@ intelSpanRenderStart(struct gl_context * ctx) struct gl_texture_object *texObj = ctx->Texture.Unit[i]._Current; intel_finalize_mipmap_tree(intel, i); - intel_tex_map_images(intel, intel_texture_object(texObj)); + intel_tex_map_images(intel, intel_texture_object(texObj), + GL_MAP_READ_BIT | GL_MAP_WRITE_BIT); } } @@ -379,7 +380,8 @@ intel_map_vertex_shader_textures(struct gl_context *ctx) ctx->VertexProgram._Current->Base.TexturesUsed[i] != 0) { struct gl_texture_object *texObj = ctx->Texture.Unit[i]._Current; - intel_tex_map_images(intel, intel_texture_object(texObj)); + intel_tex_map_images(intel, intel_texture_object(texObj), + GL_MAP_READ_BIT | GL_MAP_WRITE_BIT); } } } diff --git a/src/mesa/drivers/dri/intel/intel_tex.c b/src/mesa/drivers/dri/intel/intel_tex.c index fff2daefb95..054ae421585 100644 --- a/src/mesa/drivers/dri/intel/intel_tex.c +++ b/src/mesa/drivers/dri/intel/intel_tex.c @@ -125,6 +125,7 @@ intel_free_texture_image_buffer(struct gl_context * ctx, /** * Map texture memory/buffer into user space. * Note: the region of interest parameters are ignored here. + * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT * \param mapOut returns start of mapping of region of interest * \param rowStrideOut returns row stride in bytes */ @@ -164,7 +165,7 @@ intel_map_texture_image(struct gl_context *ctx, y /= bh; if (likely(mt)) { - void *base = intel_region_map(intel, mt->region); + void *base = intel_region_map(intel, mt->region, mode); unsigned int image_x, image_y; intel_miptree_get_image_offset(mt, tex_image->Level, tex_image->Face, diff --git a/src/mesa/drivers/dri/intel/intel_tex.h b/src/mesa/drivers/dri/intel/intel_tex.h index 85aff5fc638..8450f2984bb 100644 --- a/src/mesa/drivers/dri/intel/intel_tex.h +++ b/src/mesa/drivers/dri/intel/intel_tex.h @@ -57,14 +57,16 @@ GLuint intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit); void intel_tex_map_level_images(struct intel_context *intel, struct intel_texture_object *intelObj, - int level); + int level, + GLbitfield mode); void intel_tex_unmap_level_images(struct intel_context *intel, struct intel_texture_object *intelObj, int level); void intel_tex_map_images(struct intel_context *intel, - struct intel_texture_object *intelObj); + struct intel_texture_object *intelObj, + GLbitfield mode); void intel_tex_unmap_images(struct intel_context *intel, struct intel_texture_object *intelObj); diff --git a/src/mesa/drivers/dri/intel/intel_tex_validate.c b/src/mesa/drivers/dri/intel/intel_tex_validate.c index 178279262d9..40124009437 100644 --- a/src/mesa/drivers/dri/intel/intel_tex_validate.c +++ b/src/mesa/drivers/dri/intel/intel_tex_validate.c @@ -124,9 +124,13 @@ intel_finalize_mipmap_tree(struct intel_context *intel, GLuint unit) return true; } +/** + * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT + */ static void intel_tex_map_image_for_swrast(struct intel_context *intel, - struct intel_texture_image *intel_image) + struct intel_texture_image *intel_image, + GLbitfield mode) { int level = intel_image->base.Base.Level; int face = intel_image->base.Base.Face; @@ -163,7 +167,7 @@ intel_tex_map_image_for_swrast(struct intel_context *intel, DBG("%s \n", __FUNCTION__); - intel_image->base.Base.Data = intel_region_map(intel, mt->region); + intel_image->base.Base.Data = intel_region_map(intel, mt->region, mode); } else { assert(mt->level[level].depth == 1); intel_miptree_get_image_offset(mt, level, face, 0, &x, &y); @@ -172,7 +176,7 @@ intel_tex_map_image_for_swrast(struct intel_context *intel, DBG("%s: (%d,%d) -> (%d, %d)/%d\n", __FUNCTION__, face, level, x, y, mt->region->pitch * mt->cpp); - intel_image->base.Base.Data = intel_region_map(intel, mt->region) + + intel_image->base.Base.Data = intel_region_map(intel, mt->region, mode) + (x + y * mt->region->pitch) * mt->cpp; } @@ -189,9 +193,13 @@ intel_tex_unmap_image_for_swrast(struct intel_context *intel, } } +/** + * \param mode bitmask of GL_MAP_READ_BIT, GL_MAP_WRITE_BIT + */ void intel_tex_map_images(struct intel_context *intel, - struct intel_texture_object *intelObj) + struct intel_texture_object *intelObj, + GLbitfield mode) { GLuint nr_faces = (intelObj->base.Target == GL_TEXTURE_CUBE_MAP) ? 6 : 1; int i, face; @@ -203,7 +211,7 @@ intel_tex_map_images(struct intel_context *intel, struct intel_texture_image *intel_image = intel_texture_image(intelObj->base.Image[face][i]); - intel_tex_map_image_for_swrast(intel, intel_image); + intel_tex_map_image_for_swrast(intel, intel_image, mode); } } } -- 2.30.2