From f8411fcce91e66df8d6dae01b1e6444e57428228 Mon Sep 17 00:00:00 2001 From: Ian Bolton Date: Tue, 2 Jul 2013 11:02:17 +0000 Subject: [PATCH] AArch64 - Update insv tests for big endian From-SVN: r200597 --- gcc/testsuite/ChangeLog | 7 ++ gcc/testsuite/gcc.target/aarch64/insv_1.c | 3 +- gcc/testsuite/gcc.target/aarch64/insv_2.c | 85 +++++++++++++++++++++++ gcc/testsuite/lib/target-supports.exp | 9 +++ 4 files changed, 103 insertions(+), 1 deletion(-) create mode 100644 gcc/testsuite/gcc.target/aarch64/insv_2.c diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog index 52cf0bc63c0..0c0cae35a27 100644 --- a/gcc/testsuite/ChangeLog +++ b/gcc/testsuite/ChangeLog @@ -1,3 +1,10 @@ +2013-07-02 Ian Bolton + + * gcc.target/config/aarch64/insv_1.c: Update to show it doesn't work + on big endian. + * gcc.target/config/aarch64/insv_2.c: New test for big endian. + * lib/target-supports.exp: Define aarch64_little_endian. + 2013-07-02 Ian Bolton * gcc.target/aarch64/abs_1.c: New test. diff --git a/gcc/testsuite/gcc.target/aarch64/insv_1.c b/gcc/testsuite/gcc.target/aarch64/insv_1.c index bc8928d7347..6e3c7f0e9c4 100644 --- a/gcc/testsuite/gcc.target/aarch64/insv_1.c +++ b/gcc/testsuite/gcc.target/aarch64/insv_1.c @@ -1,5 +1,6 @@ -/* { dg-do run } */ +/* { dg-do run { target aarch64*-*-* } } */ /* { dg-options "-O2 --save-temps -fno-inline" } */ +/* { dg-require-effective-target aarch64_little_endian } */ extern void abort (void); diff --git a/gcc/testsuite/gcc.target/aarch64/insv_2.c b/gcc/testsuite/gcc.target/aarch64/insv_2.c new file mode 100644 index 00000000000..a7691a32f2b --- /dev/null +++ b/gcc/testsuite/gcc.target/aarch64/insv_2.c @@ -0,0 +1,85 @@ +/* { dg-do run { target aarch64*-*-* } } */ +/* { dg-options "-O2 --save-temps -fno-inline" } */ +/* { dg-require-effective-target aarch64_big_endian } */ + +extern void abort (void); + +typedef struct bitfield +{ + unsigned short eight: 8; + unsigned short four: 4; + unsigned short five: 5; + unsigned short seven: 7; + unsigned int sixteen: 16; +} bitfield; + +bitfield +bfi1 (bitfield a) +{ + /* { dg-final { scan-assembler "bfi\tx\[0-9\]+, x\[0-9\]+, 56, 8" } } */ + a.eight = 3; + return a; +} + +bitfield +bfi2 (bitfield a) +{ + /* { dg-final { scan-assembler "bfi\tx\[0-9\]+, x\[0-9\]+, 43, 5" } } */ + a.five = 7; + return a; +} + +bitfield +movk (bitfield a) +{ + /* { dg-final { scan-assembler "movk\tx\[0-9\]+, 0x1d6b, lsl 16" } } */ + a.sixteen = 7531; + return a; +} + +bitfield +set1 (bitfield a) +{ + /* { dg-final { scan-assembler "orr\tx\[0-9\]+, x\[0-9\]+, 272678883688448" } } */ + a.five = 0x1f; + return a; +} + +bitfield +set0 (bitfield a) +{ + /* { dg-final { scan-assembler "and\tx\[0-9\]+, x\[0-9\]+, -272678883688449" } } */ + a.five = 0; + return a; +} + + +int +main (int argc, char** argv) +{ + static bitfield a; + bitfield b = bfi1 (a); + bitfield c = bfi2 (b); + bitfield d = movk (c); + + if (d.eight != 3) + abort (); + + if (d.five != 7) + abort (); + + if (d.sixteen != 7531) + abort (); + + d = set1 (d); + if (d.five != 0x1f) + abort (); + + d = set0 (d); + if (d.five != 0) + abort (); + + return 0; +} + +/* { dg-final { cleanup-saved-temps } } */ diff --git a/gcc/testsuite/lib/target-supports.exp b/gcc/testsuite/lib/target-supports.exp index a5bca6b72c1..c7936119b31 100644 --- a/gcc/testsuite/lib/target-supports.exp +++ b/gcc/testsuite/lib/target-supports.exp @@ -2106,6 +2106,15 @@ proc check_effective_target_aarch64_big_endian { } { }] } +# Return 1 if this is a AArch64 target supporting little endian +proc check_effective_target_aarch64_little_endian { } { + return [check_no_compiler_messages aarch64_little_endian assembly { + #if !defined(__aarch64__) || defined(__AARCH64EB__) + #error FOO + #endif + }] +} + # Return 1 is this is an arm target using 32-bit instructions proc check_effective_target_arm32 { } { return [check_no_compiler_messages arm32 assembly { -- 2.30.2