From f8524449e4465db82b52105196cd5624d0421a1a Mon Sep 17 00:00:00 2001
From: Kajol Jain <kajoljain797@gmail.com>
Date: Wed, 12 Jun 2019 14:11:04 +0530
Subject: [PATCH] arch-power: Added support for Trap instructons

* Added trap instructons.
* Added trap interrupt handler.
* Raise trap interrupt whenever condition satisfied for corresponding trap instruction.
* Added bit need to set for that type of interrupt.

Change-Id: I46de00558139e0726c056fd71f819d63cb8045df
Signed-off-by: Kajol Jain <kajoljain797@gmail.com>
---
 src/arch/power/faults.hh         | 14 +++++++
 src/arch/power/isa/bitfields.isa |  3 ++
 src/arch/power/isa/decoder.isa   | 65 +++++++++++++++++++++++++++++++-
 3 files changed, 80 insertions(+), 2 deletions(-)

diff --git a/src/arch/power/faults.hh b/src/arch/power/faults.hh
index 48f149fb9..24844239c 100644
--- a/src/arch/power/faults.hh
+++ b/src/arch/power/faults.hh
@@ -33,6 +33,7 @@
 #include "cpu/thread_context.hh"
 #include "sim/faults.hh"
 
+#define SRR1_TRAP_BIT     16
 #define SRR1_PRI_BIT      17
 #define SRR1_ILLEGAL_INSTR_BIT 18
 
@@ -203,6 +204,19 @@ class ProgramIllegalInterrupt : public ProgramInterrupt
     }
 };
 
+class ProgramTrapInterrupt : public ProgramInterrupt
+{
+  public:
+    ProgramTrapInterrupt()
+    {
+    }
+    virtual void invoke(ThreadContext * tc, const StaticInstPtr &inst =
+                       StaticInst::nullStaticInstPtr)
+    {
+      ProgramInterrupt::invoke(tc, inst ,setBitMask(SRR1_TRAP_BIT));
+    }
+};
+
 class ProgramPriInterrupt : public ProgramInterrupt
 {
   public:
diff --git a/src/arch/power/isa/bitfields.isa b/src/arch/power/isa/bitfields.isa
index a92fd1ce3..c3dc787ea 100644
--- a/src/arch/power/isa/bitfields.isa
+++ b/src/arch/power/isa/bitfields.isa
@@ -98,3 +98,6 @@ def bitfield BHRB          <20:11>;
 
 //L field for mtmsr and SLB move from entry VSID,ESID instructions.
 def bitfield L             <16>;
+
+//TO field for trap instructions
+def bitfield TO           <25:21>;
diff --git a/src/arch/power/isa/decoder.isa b/src/arch/power/isa/decoder.isa
index 0edb089c5..d00250085 100644
--- a/src/arch/power/isa/decoder.isa
+++ b/src/arch/power/isa/decoder.isa
@@ -173,7 +173,6 @@ decode PO default Unknown::unknown() {
             }
             }},
               [ IsSyscall, IsNonSpeculative, IsSerializeAfter ]);
-        2: tdi({{ }});
     }
 
     format LoadDispOp {
@@ -280,6 +279,38 @@ decode PO default Unknown::unknown() {
         }
     }
 
+
+    format IntImmArithOp {
+
+        3: twi({{
+             if(FullSystem) {
+               int32_t val = Ra_sw;
+               if(((TO & 0x10) && (val < simm))                    ||
+                 ((TO & 0x08) && (val > simm))                     ||
+                 ((TO & 0x04) && (val == simm))                    ||
+                 ((TO & 0x02) && ((uint32_t)val < (uint32_t)simm)) ||
+                 ((TO & 0x01) && ((uint32_t)val > (uint32_t)simm))) {
+                  fault= std::make_shared<ProgramTrapInterrupt>();
+               }
+             }
+        }});
+
+        2: tdi({{
+            if(FullSystem) {
+              int64_t val1 = Ra_sd;
+              int64_t val2 = simm;
+              //printf("Val 1 : 0x%016lx val2: 0x%016lx\n", val,val2);
+              if(((TO & 0x10) && (val1 < val2))                    ||
+                ((TO & 0x08) && (val1 > val2))                     ||
+                ((TO & 0x04) && (val1 == val2))                    ||
+                ((TO & 0x02) && ((uint64_t)val1 < (uint64_t)val2)) ||
+                ((TO & 0x01) && ((uint64_t)val1 > (uint64_t)val2))) {
+                fault= std::make_shared<ProgramTrapInterrupt>();
+              }
+            }
+        }});
+      }
+
     format IntImmCompOp {
         11: cmpi({{
             if (length) {
@@ -404,7 +435,37 @@ decode PO default Unknown::unknown() {
         }
 
         format IntArithOp {
-            779: modsw({{
+
+            4: tw({{
+                if(FullSystem) {
+                  int32_t val1 = Ra_sw;
+                  int32_t val2 = Rb_sw;
+                  if(((TO & 0x10) && (val1 < val2))                    ||
+                    ((TO & 0x08) && (val1 > val2))                     ||
+                    ((TO & 0x04) && (val1 == val2))                    ||
+                    ((TO & 0x02) && ((uint32_t)val1 < (uint32_t)val2)) ||
+                    ((TO & 0x01) && ((uint32_t)val1 > (uint32_t)val2))) {
+                    fault= std::make_shared<ProgramTrapInterrupt>();
+                  }
+                }
+
+            }});
+
+            68: td ({{
+                if(FullSystem) {
+                  int64_t val1 = Ra_sd;
+                  int64_t val2 = Rb_sd;
+                  if(((TO & 0x10) && (val1 < val2))                    ||
+                    ((TO & 0x08) && (val1 > val2))                     ||
+                    ((TO & 0x04) && (val1 == val2))                    ||
+                    ((TO & 0x02) && ((uint64_t)val1 < (uint64_t)val2)) ||
+                    ((TO & 0x01) && ((uint64_t)val1 > (uint64_t)val2))) {
+                    fault= std::make_shared<ProgramTrapInterrupt>();
+                  }
+                }
+            }});
+
+                779: modsw({{
                 int64_t src1 = Ra_sw;
                 int64_t src2 = Rb_sw;
                 if ((src1 != INT32_MIN || src2 != -1) && src2 != 0) {
-- 
2.30.2