From f863464496ab3d0411f53e6fdf67471c5b7323c0 Mon Sep 17 00:00:00 2001 From: Richard Kenner Date: Sun, 19 Sep 1993 09:08:00 -0400 Subject: [PATCH] (PREDICATE_CODES): Fix typos and add missing entries. From-SVN: r5356 --- gcc/config/a29k/a29k.h | 15 ++++++++++----- gcc/config/alpha/alpha.h | 2 ++ gcc/config/i860/i860.h | 12 +++++------- gcc/config/i960/i960.h | 5 +++-- gcc/config/m88k/m88k.h | 3 ++- gcc/config/mips/mips.h | 4 +++- gcc/config/rs6000/rs6000.h | 12 +++++++----- 7 files changed, 32 insertions(+), 21 deletions(-) diff --git a/gcc/config/a29k/a29k.h b/gcc/config/a29k/a29k.h index dbde5c609ce..062a9eab530 100644 --- a/gcc/config/a29k/a29k.h +++ b/gcc/config/a29k/a29k.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for AMD Am29000 CPU. - Copyright (C) 1988, 1990, 1991, 1992 Free Software Foundation, Inc. + Copyright (C) 1988, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. Contributed by Richard Kenner (kenner@nyu.edu) This file is part of GNU CC. @@ -1568,15 +1568,18 @@ extern int a29k_debug_reg_map[]; {"long_const_operand", {CONST_INT, CONST, CONST_DOUBLE, \ LABEL_REF, SYMBOL_REF}}, \ {"shift_constant_operand", {CONST_INT, ASHIFT}}, \ - {"const_0__operand", {CONST_INT, ASHIFT}}, \ - {"const_8__operand", {CONST_INT, ASHIFT}}, \ - {"const_16__operand", {CONST_INT, ASHIFT}}, \ - {"const_24__operand", {CONST_INT, ASHIFT}}, \ + {"const_0_operand", {CONST_INT, ASHIFT}}, \ + {"const_8_operand", {CONST_INT, ASHIFT}}, \ + {"const_16_operand", {CONST_INT, ASHIFT}}, \ + {"const_24_operand", {CONST_INT, ASHIFT}}, \ {"float_const_operand", {CONST_DOUBLE}}, \ {"gpc_reg_operand", {SUBREG, REG}}, \ {"gpc_reg_or_float_constant_operand", {SUBREG, REG, CONST_DOUBLE}}, \ {"gpc_reg_or_integer_constant_operand", {SUBREG, REG, \ CONST_INT, CONST_DOUBLE}}, \ + {"gpc_reg_or_immediate_operand", {SUBREG, REG, CONST_INT, \ + CONST_DOUBLE, CONST, \ + SYMBOL_REF, LABEL_REF}}, \ {"spec_reg_operand", {REG}}, \ {"accum_reg_operand", {REG}}, \ {"srcb_operand", {SUBREG, REG, CONST_INT}}, \ @@ -1592,4 +1595,6 @@ extern int a29k_debug_reg_map[]; {"reload_memory_operand", {SUBREG, REG, MEM}}, \ {"fp_comparison_operator", {EQ, GT, GE}}, \ {"branch_operator", {GE, LT}}, \ + {"load_multiple_operation", {PARALLEL}}, \ + {"store_multiple_operation", {PARALLEL}}, \ {"epilogue_operand", {CODE_LABEL}}, diff --git a/gcc/config/alpha/alpha.h b/gcc/config/alpha/alpha.h index f4f11641ced..880cece20a1 100644 --- a/gcc/config/alpha/alpha.h +++ b/gcc/config/alpha/alpha.h @@ -1710,7 +1710,9 @@ literal_section () \ {"reg_or_fp0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ {"alpha_comparison_operator", {EQ, LE, LT, LEU, LTU}}, \ {"signed_comparison_operator", {EQ, NE, LE, LT, GE, GT}}, \ + {"divmod_operator", {DIV, MOD, UDIV, UMOD}}, \ {"fp0_operand", {CONST_DOUBLE}}, \ + {"current_file_function_operand", {SYMBOL_REF}}, \ {"input_operand", {SUBREG, REG, MEM, CONST_INT, CONST_DOUBLE, \ SYMBOL_REF, CONST, LABEL_REF}}, \ {"aligned_memory_operand", {MEM}}, \ diff --git a/gcc/config/i860/i860.h b/gcc/config/i860/i860.h index 2305341403c..f74ae840458 100644 --- a/gcc/config/i860/i860.h +++ b/gcc/config/i860/i860.h @@ -1397,12 +1397,7 @@ extern unsigned long sfmode_constant_to_ulong (); Instead, it allows the table built by `genrecog' to be more compact and efficient, thus speeding up the compiler. The most important predicates to include in the list specified by this - macro are thoses used in the most insn patterns. - - Note that for the i860 we have one more predicate, i.e. - `single_insn_src_operand', however this is used only - infrequently, so we don't put in the PREDICATE_CODES list. -*/ + macro are thoses used in the most insn patterns. */ #define PREDICATE_CODES \ {"reg_or_0_operand", {REG, SUBREG, CONST_INT}}, \ @@ -1414,7 +1409,10 @@ extern unsigned long sfmode_constant_to_ulong (); {"logic_const_operand", {CONST_INT}}, \ {"bte_operand", {REG, SUBREG, CONST_INT}}, \ {"indexed_operand", {MEM}}, \ - {"load_operand", {MEM}}, + {"load_operand", {MEM}}, \ + {"small_int", {CONST_INT}}, \ + {"logic_int", {CONST_INT}}, \ + {"call_insn_operand", {MEM}}, /* Define the information needed to generate branch insns. This is stored from the compare operation. Note that we can't use "rtx" here since it diff --git a/gcc/config/i960/i960.h b/gcc/config/i960/i960.h index 13713f8a6cb..e9544edf152 100644 --- a/gcc/config/i960/i960.h +++ b/gcc/config/i960/i960.h @@ -1,5 +1,5 @@ /* Definitions of target machine for GNU compiler, for Intel 80960 - Copyright (C) 1992 Free Software Foundation, Inc. + Copyright (C) 1992, 1993 Free Software Foundation, Inc. Contributed by Steven McGeady, Intel Corp. Additional Work by Glenn Colon-Bonet, Jonathan Shapiro, Andy Wilson Converted to GCC 2.0 by Jim Wilson and Michael Tiemann, Cygnus Support. @@ -1476,7 +1476,8 @@ extern enum insn_types i960_last_insn_type; {"eq_or_neq", {EQ, NE}}, \ {"arith32_operand", {SUBREG, REG, LABEL_REF, SYMBOL_REF, CONST_INT, \ CONST_DOUBLE, CONST}}, \ - {"power2_operand", {CONST_INT}}, + {"power2_operand", {CONST_INT}}, \ + {"cmplpower2_operand", {CONST_INT}}, /* Define functions in i960.c and used in insn-output.c. */ diff --git a/gcc/config/m88k/m88k.h b/gcc/config/m88k/m88k.h index b938fe55765..bc6dbeab815 100644 --- a/gcc/config/m88k/m88k.h +++ b/gcc/config/m88k/m88k.h @@ -1,6 +1,6 @@ /* Definitions of target machine for GNU compiler. Motorola m88100 in an 88open OCS/BCS environment. - Copyright (C) 1988, 1989, 1990, 1991 Free Software Foundation, Inc. + Copyright (C) 1988, 1989, 1990, 1991, 1993 Free Software Foundation, Inc. Contributed by Michael Tiemann (tiemann@mcc.com) Enhanced by Michael Meissner (meissner@osf.org) Version 2 port by Tom Wood (Tom_Wood@NeXT.com) @@ -1451,6 +1451,7 @@ enum reg_class { NO_REGS, AP_REG, XRF_REGS, GENERAL_REGS, AGRF_REGS, {"add_operand", {SUBREG, REG, CONST_INT}}, \ {"reg_or_bbx_mask_operand", {SUBREG, REG, CONST_INT}}, \ {"real_or_0_operand", {SUBREG, REG, CONST_DOUBLE}}, \ + {"reg_or_0_operand", {SUBREG, REG, CONST_INT}}, \ {"relop", {EQ, NE, LT, LE, GE, GT, LTU, LEU, GEU, GTU}}, \ {"relop_no_unsigned", {EQ, NE, LT, LE, GE, GT}}, \ {"equality_op", {EQ, NE}}, \ diff --git a/gcc/config/mips/mips.h b/gcc/config/mips/mips.h index b18597be493..e1d74e69c86 100644 --- a/gcc/config/mips/mips.h +++ b/gcc/config/mips/mips.h @@ -1,7 +1,7 @@ /* Definitions of target machine for GNU compiler. MIPS version. + Copyright (C) 1989, 1990, 1991, 1992, 1993 Free Software Foundation, Inc. Contributed by A. Lichnewsky, lich@inria.inria.fr Changed by Michael Meissner, meissner@osf.org - Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc. This file is part of GNU CC. @@ -2726,6 +2726,8 @@ while (0) {"cmp2_op", { EQ, NE, GT, GE, GTU, GEU, LT, LE, \ LTU, LEU }}, \ {"fcmp_op", { EQ, NE, GT, GE, LT, LE }}, \ + {"pc_or_label_operand", { PC, LABEL_REF }}, \ + {"call_insn_operand", { MEM }}, \ {"uns_cmp_op", { GTU, GEU, LTU, LEU }}, diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h index e7e2062161f..84f80b84395 100644 --- a/gcc/config/rs6000/rs6000.h +++ b/gcc/config/rs6000/rs6000.h @@ -2004,9 +2004,11 @@ toc_section () \ {"non_logical_cint_operand", {CONST_INT}}, \ {"mask_operand", {CONST_INT}}, \ {"call_operand", {SYMBOL_REF, REG}}, \ - {"current_file_function_operand", {SYMBOL_REF}}, \ + {"current_file_function_operand", {SYMBOL_REF}}, \ {"input_operand", {SUBREG, MEM, REG, CONST_INT}}, \ - {"branch_comparison_operation", {EQ, NE, LE, LT, GE, \ - LT, LEU, LTU, GEU, GTU}}, \ - {"scc_comparison_operation", {EQ, NE, LE, LT, GE, \ - LT, LEU, LTU, GEU, GTU}}, + {"load_multiple_operation", {PARALLEL}}, \ + {"store_multiple_operation", {PARALLEL}}, \ + {"branch_comparison_operator", {EQ, NE, LE, LT, GE, \ + LT, LEU, LTU, GEU, GTU}}, \ + {"scc_comparison_operator", {EQ, NE, LE, LT, GE, \ + LT, LEU, LTU, GEU, GTU}}, -- 2.30.2