From f93740efc1c75e26a7cb4bb7b41a60fcfdd4fed3 Mon Sep 17 00:00:00 2001 From: Timothy Arceri Date: Wed, 6 Dec 2017 13:30:33 +1100 Subject: [PATCH] ac: add {tcs,tes}_patch_id to the abi MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit Reviewed-by: Nicolai Hähnle Reviewed-by: Marek Olšák --- src/amd/common/ac_nir_to_llvm.c | 14 ++++++-------- src/amd/common/ac_shader_abi.h | 2 ++ src/gallium/drivers/radeonsi/si_shader.c | 17 ++++++++--------- .../drivers/radeonsi/si_shader_internal.h | 2 -- 4 files changed, 16 insertions(+), 19 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index f8a63eab82d..8dc1d903e0a 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -111,10 +111,8 @@ struct nir_to_llvm_context { LLVMValueRef oc_lds; LLVMValueRef merged_wave_info; LLVMValueRef tess_factor_offset; - LLVMValueRef tcs_patch_id; LLVMValueRef tcs_rel_ids; LLVMValueRef tes_rel_patch_id; - LLVMValueRef tes_patch_id; LLVMValueRef tes_u; LLVMValueRef tes_v; @@ -684,7 +682,7 @@ declare_tes_input_vgprs(struct nir_to_llvm_context *ctx, struct arg_info *args) add_arg(args, ARG_VGPR, ctx->ac.f32, &ctx->tes_u); add_arg(args, ARG_VGPR, ctx->ac.f32, &ctx->tes_v); add_arg(args, ARG_VGPR, ctx->ac.i32, &ctx->tes_rel_patch_id); - add_arg(args, ARG_VGPR, ctx->ac.i32, &ctx->tes_patch_id); + add_arg(args, ARG_VGPR, ctx->ac.i32, &ctx->abi.tes_patch_id); } static void @@ -850,7 +848,7 @@ static void create_function(struct nir_to_llvm_context *ctx, &ctx->view_index); add_arg(&args, ARG_VGPR, ctx->ac.i32, - &ctx->tcs_patch_id); + &ctx->abi.tcs_patch_id); add_arg(&args, ARG_VGPR, ctx->ac.i32, &ctx->tcs_rel_ids); @@ -878,7 +876,7 @@ static void create_function(struct nir_to_llvm_context *ctx, add_arg(&args, ARG_SGPR, ctx->ac.i32, &ctx->tess_factor_offset); add_arg(&args, ARG_VGPR, ctx->ac.i32, - &ctx->tcs_patch_id); + &ctx->abi.tcs_patch_id); add_arg(&args, ARG_VGPR, ctx->ac.i32, &ctx->tcs_rel_ids); } @@ -4217,9 +4215,9 @@ static void visit_intrinsic(struct ac_nir_context *ctx, if (ctx->stage == MESA_SHADER_GEOMETRY) { result = ctx->abi->gs_prim_id; } else if (ctx->stage == MESA_SHADER_TESS_CTRL) { - result = ctx->nctx->tcs_patch_id; + result = ctx->abi->tcs_patch_id; } else if (ctx->stage == MESA_SHADER_TESS_EVAL) { - result = ctx->nctx->tes_patch_id; + result = ctx->abi->tes_patch_id; } else fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage); break; @@ -6542,7 +6540,7 @@ static void ac_nir_fixup_ls_hs_input_vgprs(struct nir_to_llvm_context *ctx) ctx->abi.instance_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->rel_auto_id, ctx->abi.instance_id, ""); ctx->vs_prim_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->abi.vertex_id, ctx->vs_prim_id, ""); ctx->rel_auto_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->tcs_rel_ids, ctx->rel_auto_id, ""); - ctx->abi.vertex_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->tcs_patch_id, ctx->abi.vertex_id, ""); + ctx->abi.vertex_id = LLVMBuildSelect(ctx->ac.builder, hs_empty, ctx->abi.tcs_patch_id, ctx->abi.vertex_id, ""); } static void prepare_gs_input_vgprs(struct nir_to_llvm_context *ctx) diff --git a/src/amd/common/ac_shader_abi.h b/src/amd/common/ac_shader_abi.h index fd2ec06fb14..6f526d9f254 100644 --- a/src/amd/common/ac_shader_abi.h +++ b/src/amd/common/ac_shader_abi.h @@ -42,6 +42,8 @@ struct ac_shader_abi { LLVMValueRef draw_id; LLVMValueRef vertex_id; LLVMValueRef instance_id; + LLVMValueRef tcs_patch_id; + LLVMValueRef tes_patch_id; LLVMValueRef gs_prim_id; LLVMValueRef gs_invocation_id; LLVMValueRef frag_pos[4]; diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c index 39a8906312d..87719e0fdbb 100644 --- a/src/gallium/drivers/radeonsi/si_shader.c +++ b/src/gallium/drivers/radeonsi/si_shader.c @@ -763,11 +763,9 @@ static LLVMValueRef get_primitive_id(struct si_shader_context *ctx, return LLVMGetParam(ctx->main_fn, ctx->param_vs_prim_id); case PIPE_SHADER_TESS_CTRL: - return LLVMGetParam(ctx->main_fn, - ctx->param_tcs_patch_id); + return ctx->abi.tcs_patch_id; case PIPE_SHADER_TESS_EVAL: - return LLVMGetParam(ctx->main_fn, - ctx->param_tes_patch_id); + return ctx->abi.tes_patch_id; case PIPE_SHADER_GEOMETRY: return ctx->abi.gs_prim_id; default: @@ -3363,8 +3361,9 @@ static void si_set_ls_return_value_for_tcs(struct si_shader_context *ctx) 8 + GFX9_SGPR_TCS_SAMPLERS_AND_IMAGES); unsigned vgpr = 8 + GFX9_TCS_NUM_USER_SGPR; - ret = si_insert_input_ret_float(ctx, ret, - ctx->param_tcs_patch_id, vgpr++); + ret = LLVMBuildInsertValue(ctx->ac.builder, ret, + ac_to_float(&ctx->ac, ctx->abi.tcs_patch_id), + vgpr++, ""); ret = si_insert_input_ret_float(ctx, ret, ctx->param_tcs_rel_ids, vgpr++); ctx->return_value = ret; @@ -4564,7 +4563,7 @@ static void declare_tes_input_vgprs(struct si_shader_context *ctx, ctx->param_tes_u = add_arg(fninfo, ARG_VGPR, ctx->f32); ctx->param_tes_v = add_arg(fninfo, ARG_VGPR, ctx->f32); ctx->param_tes_rel_patch_id = add_arg(fninfo, ARG_VGPR, ctx->i32); - ctx->param_tes_patch_id = add_arg(fninfo, ARG_VGPR, ctx->i32); + add_arg_assign(fninfo, ARG_VGPR, ctx->i32, &ctx->abi.tes_patch_id); } enum { @@ -4661,7 +4660,7 @@ static void create_function(struct si_shader_context *ctx) ctx->param_tcs_factor_offset = add_arg(&fninfo, ARG_SGPR, ctx->i32); /* VGPRs */ - ctx->param_tcs_patch_id = add_arg(&fninfo, ARG_VGPR, ctx->i32); + add_arg_assign(&fninfo, ARG_VGPR, ctx->i32, &ctx->abi.tcs_patch_id); ctx->param_tcs_rel_ids = add_arg(&fninfo, ARG_VGPR, ctx->i32); /* param_tcs_offchip_offset and param_tcs_factor_offset are @@ -4700,7 +4699,7 @@ static void create_function(struct si_shader_context *ctx) ctx->type == PIPE_SHADER_TESS_CTRL); /* VGPRs (first TCS, then VS) */ - ctx->param_tcs_patch_id = add_arg(&fninfo, ARG_VGPR, ctx->i32); + add_arg_assign(&fninfo, ARG_VGPR, ctx->i32, &ctx->abi.tcs_patch_id); ctx->param_tcs_rel_ids = add_arg(&fninfo, ARG_VGPR, ctx->i32); if (ctx->type == PIPE_SHADER_VERTEX) { diff --git a/src/gallium/drivers/radeonsi/si_shader_internal.h b/src/gallium/drivers/radeonsi/si_shader_internal.h index 378bfc1a7ac..4a51958676a 100644 --- a/src/gallium/drivers/radeonsi/si_shader_internal.h +++ b/src/gallium/drivers/radeonsi/si_shader_internal.h @@ -169,14 +169,12 @@ struct si_shader_context { int param_tcs_factor_addr_base64k; int param_tcs_offchip_offset; int param_tcs_factor_offset; - int param_tcs_patch_id; int param_tcs_rel_ids; /* API TES */ int param_tes_u; int param_tes_v; int param_tes_rel_patch_id; - int param_tes_patch_id; /* HW ES */ int param_es2gs_offset; /* API GS */ -- 2.30.2