From f9380e000966262b5a2d255729346043074cec66 Mon Sep 17 00:00:00 2001 From: lkcl Date: Wed, 25 May 2022 10:16:35 +0100 Subject: [PATCH] --- openpower/sv/bitmanip.mdwn | 7 +++++-- 1 file changed, 5 insertions(+), 2 deletions(-) diff --git a/openpower/sv/bitmanip.mdwn b/openpower/sv/bitmanip.mdwn index 6a40d3ac4..ff2e99ef0 100644 --- a/openpower/sv/bitmanip.mdwn +++ b/openpower/sv/bitmanip.mdwn @@ -194,7 +194,8 @@ table comes from a register not an immediate. | NN | RT | RA | RB | RC |nh 00001| VA-Form | | NN | RT | RA | RB | /BFA/ |0 01001| VA-Form | -For binlut: +For binlut, the 4-bit LUT may be selected from either the high nibble +or the low nibble of the first byte of RC: lut2(imm, a, b): idx = b << 1 | a @@ -215,7 +216,9 @@ Vector or Scalar. *Programmer's note: a dynamic ternary lookup may be synthesised from a pair of `binlut` instructions followed by a `ternlogi` to select which to merge. Use `nh` to select which nibble to use as the lookup table -from the RC source register (`nh=1` nibble high)* +from the RC source register (`nh=1` nibble high), i.e. keeping +an 8-bit LUT3 in RC, the first `binlut` instruction may set nh=0 and +the second nh=1.* ## crternlogi -- 2.30.2