From f9405b6348ba821cdc6a9d4c2e0e03050b16a0f9 Mon Sep 17 00:00:00 2001 From: Kyrylo Tkachov Date: Wed, 22 Jun 2016 09:25:54 +0000 Subject: [PATCH] [ARM] Add initial support for Cortex-A73 * config/arm/arm.c (arm_cortex_a73_tune): New struct. * config/arm/arm-cores.def (cortex-a73): New entry. (cortex-a73.cortex-a35): Likewise. (cortex-a73.cortex-a53): Likewise. * config/arm/arm-tables.opt: Regenerate. * config/arm/arm-tune.md: Likewise. * config/arm/bpabi.h (BE8_LINK_SPEC): Handle mcpu=cortex-a73, mcpu=cortex-a73.cortex-a35 and mcpu=cortex-a73.cortex-a53. * config/arm/t-aprofile: Handle mcpu=cortex-a73, mcpu=cortex-a73.cortex-a35 and mcpu=cortex-a73.cortex-a53. * doc/invoke.texi (ARM Options): Document cortex-a73, cortex-a73.cortex-a35 and cortex-a73.cortex-a53. From-SVN: r237681 --- gcc/ChangeLog | 15 +++++++++++++++ gcc/config/arm/arm-cores.def | 4 ++++ gcc/config/arm/arm-tables.opt | 9 +++++++++ gcc/config/arm/arm-tune.md | 5 +++-- gcc/config/arm/arm.c | 23 +++++++++++++++++++++++ gcc/config/arm/bpabi.h | 6 ++++++ gcc/config/arm/t-aprofile | 3 +++ gcc/doc/invoke.texi | 5 +++-- 8 files changed, 66 insertions(+), 4 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 88693a4ec0e..b779396ed81 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,18 @@ +2016-06-22 Kyrylo Tkachov + + * config/arm/arm.c (arm_cortex_a73_tune): New struct. + * config/arm/arm-cores.def (cortex-a73): New entry. + (cortex-a73.cortex-a35): Likewise. + (cortex-a73.cortex-a53): Likewise. + * config/arm/arm-tables.opt: Regenerate. + * config/arm/arm-tune.md: Likewise. + * config/arm/bpabi.h (BE8_LINK_SPEC): Handle mcpu=cortex-a73, + mcpu=cortex-a73.cortex-a35 and mcpu=cortex-a73.cortex-a53. + * config/arm/t-aprofile: Handle mcpu=cortex-a73, + mcpu=cortex-a73.cortex-a35 and mcpu=cortex-a73.cortex-a53. + * doc/invoke.texi (ARM Options): Document cortex-a73, + cortex-a73.cortex-a35 and cortex-a73.cortex-a53. + 2016-06-22 Kyrylo Tkachov * config/aarch64/aarch64.c (cortexa73_tunings): New struct. diff --git a/gcc/config/arm/arm-cores.def b/gcc/config/arm/arm-cores.def index 829b839c420..a53c7d819f5 100644 --- a/gcc/config/arm/arm-cores.def +++ b/gcc/config/arm/arm-cores.def @@ -171,6 +171,7 @@ ARM_CORE("cortex-a35", cortexa35, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED ARM_CORE("cortex-a53", cortexa53, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a53) ARM_CORE("cortex-a57", cortexa57, cortexa57, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) ARM_CORE("cortex-a72", cortexa72, cortexa57, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) +ARM_CORE("cortex-a73", cortexa73, cortexa57, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a73) ARM_CORE("exynos-m1", exynosm1, exynosm1, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), exynosm1) ARM_CORE("qdf24xx", qdf24xx, cortexa57, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) ARM_CORE("xgene1", xgene1, xgene1, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_FOR_ARCH8A), xgene1) @@ -178,3 +179,6 @@ ARM_CORE("xgene1", xgene1, xgene1, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCH /* V8 big.LITTLE implementations */ ARM_CORE("cortex-a57.cortex-a53", cortexa57cortexa53, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) ARM_CORE("cortex-a72.cortex-a53", cortexa72cortexa53, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a57) +ARM_CORE("cortex-a73.cortex-a35", cortexa73cortexa35, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a73) +ARM_CORE("cortex-a73.cortex-a53", cortexa73cortexa53, cortexa53, 8A, ARM_FSET_MAKE_CPU1 (FL_LDSCHED | FL_CRC32 | FL_FOR_ARCH8A), cortex_a73) + diff --git a/gcc/config/arm/arm-tables.opt b/gcc/config/arm/arm-tables.opt index adec6c95367..a5fe2c36da2 100644 --- a/gcc/config/arm/arm-tables.opt +++ b/gcc/config/arm/arm-tables.opt @@ -321,6 +321,9 @@ Enum(processor_type) String(cortex-a57) Value(cortexa57) EnumValue Enum(processor_type) String(cortex-a72) Value(cortexa72) +EnumValue +Enum(processor_type) String(cortex-a73) Value(cortexa73) + EnumValue Enum(processor_type) String(exynos-m1) Value(exynosm1) @@ -336,6 +339,12 @@ Enum(processor_type) String(cortex-a57.cortex-a53) Value(cortexa57cortexa53) EnumValue Enum(processor_type) String(cortex-a72.cortex-a53) Value(cortexa72cortexa53) +EnumValue +Enum(processor_type) String(cortex-a73.cortex-a35) Value(cortexa73cortexa35) + +EnumValue +Enum(processor_type) String(cortex-a73.cortex-a53) Value(cortexa73cortexa53) + Enum Name(arm_arch) Type(int) Known ARM architectures (for use with the -march= option): diff --git a/gcc/config/arm/arm-tune.md b/gcc/config/arm/arm-tune.md index d9f02a177e3..594ce9d1734 100644 --- a/gcc/config/arm/arm-tune.md +++ b/gcc/config/arm/arm-tune.md @@ -34,6 +34,7 @@ cortexm3,marvell_pj4,cortexa15cortexa7, cortexa17cortexa7,cortexa32,cortexa35, cortexa53,cortexa57,cortexa72, - exynosm1,qdf24xx,xgene1, - cortexa57cortexa53,cortexa72cortexa53" + cortexa73,exynosm1,qdf24xx, + xgene1,cortexa57cortexa53,cortexa72cortexa53, + cortexa73cortexa35,cortexa73cortexa53" (const (symbol_ref "((enum attr_tune) arm_tune)"))) diff --git a/gcc/config/arm/arm.c b/gcc/config/arm/arm.c index 3503c15420e..a7dda1f53ca 100644 --- a/gcc/config/arm/arm.c +++ b/gcc/config/arm/arm.c @@ -2125,6 +2125,29 @@ const struct tune_params arm_cortex_a12_tune = tune_params::SCHED_AUTOPREF_OFF }; +const struct tune_params arm_cortex_a73_tune = +{ + arm_9e_rtx_costs, + &cortexa57_extra_costs, + NULL, /* Sched adj cost. */ + arm_default_branch_cost, + &arm_default_vec_cost, /* Vectorizer costs. */ + 1, /* Constant limit. */ + 2, /* Max cond insns. */ + 8, /* Memset max inline. */ + 2, /* Issue rate. */ + ARM_PREFETCH_NOT_BENEFICIAL, + tune_params::PREF_CONST_POOL_FALSE, + tune_params::PREF_LDRD_TRUE, + tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE, /* Thumb. */ + tune_params::LOG_OP_NON_SHORT_CIRCUIT_TRUE, /* ARM. */ + tune_params::DISPARAGE_FLAGS_ALL, + tune_params::PREF_NEON_64_FALSE, + tune_params::PREF_NEON_STRINGOPS_TRUE, + FUSE_OPS (tune_params::FUSE_AES_AESMC | tune_params::FUSE_MOVW_MOVT), + tune_params::SCHED_AUTOPREF_FULL +}; + /* armv7m tuning. On Cortex-M4 cores for example, MOVW/MOVT take a single cycle to execute each. An LDR from the constant pool also takes two cycles to execute, but mildly increases pipelining opportunity (consecutive diff --git a/gcc/config/arm/bpabi.h b/gcc/config/arm/bpabi.h index 06488baed31..d6d394ace44 100644 --- a/gcc/config/arm/bpabi.h +++ b/gcc/config/arm/bpabi.h @@ -75,6 +75,9 @@ |mcpu=cortex-a57.cortex-a53 \ |mcpu=cortex-a72 \ |mcpu=cortex-a72.cortex-a53 \ + |mcpu=cortex-a73 \ + |mcpu=cortex-a73.cortex-a35 \ + |mcpu=cortex-a73.cortex-a53 \ |mcpu=exynos-m1 \ |mcpu=qdf24xx \ |mcpu=xgene1 \ @@ -105,6 +108,9 @@ |mcpu=cortex-a57.cortex-a53 \ |mcpu=cortex-a72 \ |mcpu=cortex-a72.cortex-a53 \ + |mcpu=cortex-a73 \ + |mcpu=cortex-a73.cortex-a35 \ + |mcpu=cortex-a73.cortex-a53 \ |mcpu=exynos-m1 \ |mcpu=qdf24xx \ |mcpu=xgene1 \ diff --git a/gcc/config/arm/t-aprofile b/gcc/config/arm/t-aprofile index b0ecc2fe45d..1b34b5444aa 100644 --- a/gcc/config/arm/t-aprofile +++ b/gcc/config/arm/t-aprofile @@ -93,6 +93,9 @@ MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57 MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a57.cortex-a53 MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72 MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a72.cortex-a53 +MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73 +MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73.cortex-a35 +MULTILIB_MATCHES += march?armv8-a=mcpu?cortex-a73.cortex-a53 MULTILIB_MATCHES += march?armv8-a=mcpu?exynos-m1 MULTILIB_MATCHES += march?armv8-a=mcpu?qdf24xx MULTILIB_MATCHES += march?armv8-a=mcpu?xgene1 diff --git a/gcc/doc/invoke.texi b/gcc/doc/invoke.texi index 6e097bc3525..fdb65f025a1 100644 --- a/gcc/doc/invoke.texi +++ b/gcc/doc/invoke.texi @@ -14158,7 +14158,7 @@ Permissible names are: @samp{arm2}, @samp{arm250}, @samp{generic-armv7-a}, @samp{cortex-a5}, @samp{cortex-a7}, @samp{cortex-a8}, @samp{cortex-a9}, @samp{cortex-a12}, @samp{cortex-a15}, @samp{cortex-a17}, @samp{cortex-a32}, @samp{cortex-a35}, @samp{cortex-a53}, @samp{cortex-a57}, -@samp{cortex-a72}, @samp{cortex-r4}, +@samp{cortex-a72}, @samp{cortex-a73}, @samp{cortex-r4}, @samp{cortex-r4f}, @samp{cortex-r5}, @samp{cortex-r7}, @samp{cortex-r8}, @samp{cortex-m7}, @samp{cortex-m4}, @@ -14180,7 +14180,8 @@ Permissible names are: @samp{arm2}, @samp{arm250}, Additionally, this option can specify that GCC should tune the performance of the code for a big.LITTLE system. Permissible names are: @samp{cortex-a15.cortex-a7}, @samp{cortex-a17.cortex-a7}, -@samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}. +@samp{cortex-a57.cortex-a53}, @samp{cortex-a72.cortex-a53}, +@samp{cortex-a72.cortex-a35}, @samp{cortex-a73.cortex-a53}. @option{-mtune=generic-@var{arch}} specifies that GCC should tune the performance for a blend of processors within architecture @var{arch}. -- 2.30.2