From f97b3e29b1c1f9c7d9d2012b943890763614f98b Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 3 Oct 2022 07:36:40 +0100 Subject: [PATCH] --- openpower/sv/normal.mdwn | 33 +++++++-------------------------- 1 file changed, 7 insertions(+), 26 deletions(-) diff --git a/openpower/sv/normal.mdwn b/openpower/sv/normal.mdwn index b41a0c1a7..620427855 100644 --- a/openpower/sv/normal.mdwn +++ b/openpower/sv/normal.mdwn @@ -36,9 +36,6 @@ and FP. is as if the *destination* predicate bit was zero even before starting the operation. When Rc=1 the CR element however is still stored in the CR regfile, even if the test failed. See appendix for details. -* **Pack/Unpack** mode, only available when SUBVL is vec2/3/4, performs -basic structure packing on sub-elements. Bits 4-5 (normally elwidth) are -taken up as Pack/Unpack bits. Saturation may be simultaneously enabled. Note that ffirst and reduce modes are not anticipated to be high-performance in some implementations. ffirst due to interactions with VL, and reduce due to it requiring additional operations to produce a result. simple, saturate and pred-result are however inter-element independent and may easily be parallelised to give high performance, regardless of the value of VL. @@ -213,11 +210,16 @@ can and will will rely. When Floating-point exceptions are enabled VL must be truncated at the point where the Exception appears not to have occurred. If `VLi` -is set then VL must include the faulting element. Although very strongly +is set then VL must include the faulting element, and thus the +faulting element will always raise its exception. If however `VLi` +is clear then VL **excludes** the faulting element and thus the +exception will **never** be raised. + +Although very strongly discouraged the Exception Mode that permits Floating Point Exception notification to arrive too late to unwind is permitted (under protest, due it violating -the otherwise 100% Deterministic nature of Data-dependent Fail-first).the +the otherwise 100% Deterministic nature of Data-dependent Fail-first). **Use of lax FP Exception Notification Mode could result in parallel computations proceeding with invalid results that have to be explicitly @@ -264,24 +266,3 @@ element result is *always* discarded, never written (just like `cmp`). Note that predication is still respected: predicate zeroing is slightly different: elements that fail the CR test *or* are masked out are zero'd. -# Pack/Unpack Mode - -TODO - move to `sv.setvl` [[sv/setvl]] - -Structured Pack/Unpack is similar to VSX `vpack` and `vunpack` except -generalised not only to a Schedule to be applied to any operation but -also extended to vec2/3/4. - -Setting this mode changes the meaning of bits 4-5 in `RM` from being -`ELWIDTH` to a pair of Pack/Unpack bits. Thus it is not possible -to separately override source and destination elwidths at the same -time as use Pack/Unpack: the `SRC_ELWIDTH` bits (6-7) must be used as -both source and destination elwidth. - -This was considered to be an acceptable -compromise. If separate elwidths are required and Pack/Unpack -needed without needing to perform a widening or narrowing register -move then [[sv/remap]] may be used: Matrix Mode may perform the -same operation (but is more costly to set up). -See [[sv/svp64/appendix]] for details on how Pack/Unpack -is implemented. -- 2.30.2