From f9bfc01578acfde8de7c5c1172732fb2a76caa95 Mon Sep 17 00:00:00 2001 From: Mike Frysinger Date: Tue, 6 Jul 2021 23:56:13 -0400 Subject: [PATCH] sim: drop unused targ-vals.h includes This is used in a few places where it's not needed. Drop the include to avoid the build-time generated header file as we move to drop it. --- sim/common/sim-io.c | 1 - sim/common/sim-syscall.c | 1 - sim/common/syscall.c | 1 - sim/m32r/traps.c | 1 - sim/msp430/msp430-sim.c | 1 - sim/riscv/sim-main.c | 2 -- 6 files changed, 7 deletions(-) diff --git a/sim/common/sim-io.c b/sim/common/sim-io.c index a5a7ff17b06..7bb504c7429 100644 --- a/sim/common/sim-io.c +++ b/sim/common/sim-io.c @@ -25,7 +25,6 @@ #include "sim-main.h" #include "sim-io.h" #include "sim/callback.h" -#include "targ-vals.h" #include #if HAVE_FCNTL_H diff --git a/sim/common/sim-syscall.c b/sim/common/sim-syscall.c index f24d761ee8f..1e83db2ae8a 100644 --- a/sim/common/sim-syscall.c +++ b/sim/common/sim-syscall.c @@ -25,7 +25,6 @@ #include "sim-main.h" #include "sim-syscall.h" #include "sim/callback.h" -#include "targ-vals.h" /* Read/write functions for system call interface. */ diff --git a/sim/common/syscall.c b/sim/common/syscall.c index 6efddcfecde..e353d862504 100644 --- a/sim/common/syscall.c +++ b/sim/common/syscall.c @@ -41,7 +41,6 @@ #include #include #include "sim/callback.h" -#include "targ-vals.h" #ifndef ENOSYS #define ENOSYS EINVAL diff --git a/sim/m32r/traps.c b/sim/m32r/traps.c index 2d7738b1f3c..0373cc7a408 100644 --- a/sim/m32r/traps.c +++ b/sim/m32r/traps.c @@ -26,7 +26,6 @@ #include "sim-syscall.h" #include "sim/callback.h" #include "syscall.h" -#include "targ-vals.h" #include #include #include diff --git a/sim/msp430/msp430-sim.c b/sim/msp430/msp430-sim.c index c9bb9c78db6..6f1c14f759e 100644 --- a/sim/msp430/msp430-sim.c +++ b/sim/msp430/msp430-sim.c @@ -32,7 +32,6 @@ #include "sim-main.h" #include "sim-signal.h" #include "sim-syscall.h" -#include "targ-vals.h" static sim_cia msp430_pc_fetch (SIM_CPU *cpu) diff --git a/sim/riscv/sim-main.c b/sim/riscv/sim-main.c index 0faf9395ae5..d2d4cddd291 100644 --- a/sim/riscv/sim-main.c +++ b/sim/riscv/sim-main.c @@ -34,8 +34,6 @@ #include "opcode/riscv.h" #include "gdb/sim-riscv.h" - -#include "targ-vals.h" #define TRACE_REG(cpu, reg) \ TRACE_REGISTER (cpu, "wrote %s = %#" PRIxTW, riscv_gpr_names_abi[reg], \ -- 2.30.2