From f9ea9950e0d2b51c94497d0011aa7718c41fbd2d Mon Sep 17 00:00:00 2001 From: Michael Meissner Date: Tue, 9 Dec 2014 03:56:28 +0000 Subject: [PATCH] re PR target/64204 (gcc.dg/c11-atomic-2.c fails on powerpc 64-bit little endian after -mupper-regs patches went in) 2014-12-08 Michael Meissner PR target/64204 * config/rs6000/rs6000.c (rs6000_emit_move): Do not split TFmode constant moves if -mupper-regs-df. * config/rs6000/rs6000.md (mov_64bit_dm): Optimize moving 0.0L to TFmode. (movtd_64bit_nodm): Likewise. (mov_32bit, FMOVE128 case): Likewise. From-SVN: r218505 --- gcc/ChangeLog | 11 +++++++++++ gcc/config/rs6000/rs6000.c | 6 ++++-- gcc/config/rs6000/rs6000.md | 18 +++++++++--------- 3 files changed, 24 insertions(+), 11 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 9ec29799393..5217b8d57a6 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,14 @@ +2014-12-08 Michael Meissner + + PR target/64204 + * config/rs6000/rs6000.c (rs6000_emit_move): Do not split TFmode + constant moves if -mupper-regs-df. + + * config/rs6000/rs6000.md (mov_64bit_dm): Optimize moving + 0.0L to TFmode. + (movtd_64bit_nodm): Likewise. + (mov_32bit, FMOVE128 case): Likewise. + 2014-12-08 Sandra Loosemore * simplify-rtx.c (simplify_relational_operation_1): Handle diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c index f3818e65953..be092a64eb9 100644 --- a/gcc/config/rs6000/rs6000.c +++ b/gcc/config/rs6000/rs6000.c @@ -8396,9 +8396,11 @@ rs6000_emit_move (rtx dest, rtx source, machine_mode mode) || ! nonimmediate_operand (operands[0], mode))) goto emit_set; - /* 128-bit constant floating-point values on Darwin should really be - loaded as two parts. */ + /* 128-bit constant floating-point values on Darwin should really be loaded + as two parts. However, this premature splitting is a problem when DFmode + values can go into Altivec registers. */ if (!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 + && !reg_addr[DFmode].scalar_in_vmx_p && mode == TFmode && GET_CODE (operands[1]) == CONST_DOUBLE) { rs6000_emit_move (simplify_gen_subreg (DFmode, operands[0], mode, 0), diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md index fbf3c16e3e4..8fc186f1fe9 100644 --- a/gcc/config/rs6000/rs6000.md +++ b/gcc/config/rs6000/rs6000.md @@ -8086,8 +8086,8 @@ ;; problematical. Don't allow direct move for this case. (define_insn_and_split "*mov_64bit_dm" - [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r,r,wm") - (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r,wm,r"))] + [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,ws,Y,r,r,r,wm") + (match_operand:FMOVE128 1 "input_operand" "d,m,d,j,r,jYGHF,r,wm,r"))] "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64 && (mode != TDmode || WORDS_BIG_ENDIAN) && (gpc_reg_operand (operands[0], mode) @@ -8096,11 +8096,11 @@ "&& reload_completed" [(pc)] { rs6000_split_multireg_move (operands[0], operands[1]); DONE; } - [(set_attr "length" "8,8,8,12,12,8,8,8")]) + [(set_attr "length" "8,8,8,8,12,12,8,8,8")]) (define_insn_and_split "*movtd_64bit_nodm" - [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,Y,r,r") - (match_operand:TD 1 "input_operand" "d,m,d,r,YGHF,r"))] + [(set (match_operand:TD 0 "nonimmediate_operand" "=m,d,d,ws,Y,r,r") + (match_operand:TD 1 "input_operand" "d,m,d,j,r,jYGHF,r"))] "TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_POWERPC64 && !WORDS_BIG_ENDIAN && (gpc_reg_operand (operands[0], TDmode) || gpc_reg_operand (operands[1], TDmode))" @@ -8108,11 +8108,11 @@ "&& reload_completed" [(pc)] { rs6000_split_multireg_move (operands[0], operands[1]); DONE; } - [(set_attr "length" "8,8,8,12,12,8")]) + [(set_attr "length" "8,8,8,8,12,12,8")]) (define_insn_and_split "*mov_32bit" - [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,Y,r,r") - (match_operand:FMOVE128 1 "input_operand" "d,m,d,r,YGHF,r"))] + [(set (match_operand:FMOVE128 0 "nonimmediate_operand" "=m,d,d,ws,Y,r,r") + (match_operand:FMOVE128 1 "input_operand" "d,m,d,j,r,jYGHF,r"))] "TARGET_HARD_FLOAT && TARGET_FPRS && !TARGET_POWERPC64 && (gpc_reg_operand (operands[0], mode) || gpc_reg_operand (operands[1], mode))" @@ -8120,7 +8120,7 @@ "&& reload_completed" [(pc)] { rs6000_split_multireg_move (operands[0], operands[1]); DONE; } - [(set_attr "length" "8,8,8,20,20,16")]) + [(set_attr "length" "8,8,8,8,20,20,16")]) (define_insn_and_split "*mov_softfloat" [(set (match_operand:FMOVE128 0 "rs6000_nonimmediate_operand" "=Y,r,r") -- 2.30.2