From f9eb1ef870eba9fdacf9a8cbd815ec3bff81db05 Mon Sep 17 00:00:00 2001 From: =?utf8?q?Marek=20Ol=C5=A1=C3=A1k?= Date: Wed, 16 May 2018 22:23:41 -0400 Subject: [PATCH] amd: remove support for LLVM 4.0 It doesn't support GFX9. Acked-by: Dave Airlie Acked-by: Samuel Pitoiset --- .travis.yml | 6 +- configure.ac | 4 +- meson.build | 4 +- src/amd/common/ac_llvm_build.c | 282 +++++++----------- src/amd/common/ac_llvm_helper.cpp | 12 - src/amd/vulkan/radv_debug.c | 8 +- src/amd/vulkan/radv_device.c | 9 +- src/amd/vulkan/radv_nir_to_llvm.c | 2 +- .../vulkan/winsys/amdgpu/radv_amdgpu_winsys.c | 7 - src/gallium/drivers/radeonsi/si_get.c | 4 +- src/gallium/drivers/radeonsi/si_pipe.c | 2 +- .../drivers/radeonsi/si_shader_tgsi_setup.c | 3 +- src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c | 7 - 13 files changed, 121 insertions(+), 229 deletions(-) diff --git a/.travis.yml b/.travis.yml index e0d6a827a6d..c8b68a66967 100644 --- a/.travis.yml +++ b/.travis.yml @@ -123,7 +123,7 @@ matrix: - BUILD=make - MAKEFLAGS="-j4" - MAKE_CHECK_COMMAND="true" - - LLVM_VERSION=4.0 + - LLVM_VERSION=5.0 - LLVM_CONFIG="llvm-config-${LLVM_VERSION}" - DRI_LOADERS="--disable-glx --disable-gbm --disable-egl" - DRI_DRIVERS="" @@ -134,12 +134,12 @@ matrix: addons: apt: sources: - - llvm-toolchain-trusty-4.0 + - llvm-toolchain-trusty-5.0 packages: # LLVM packaging is broken and misses these dependencies - libedit-dev # From sources above - - llvm-4.0-dev + - llvm-5.0-dev # Common - xz-utils - x11proto-xf86vidmode-dev diff --git a/configure.ac b/configure.ac index 401025bf2ef..62063c1c8a7 100644 --- a/configure.ac +++ b/configure.ac @@ -107,8 +107,8 @@ dnl LLVM versions LLVM_REQUIRED_GALLIUM=3.3.0 LLVM_REQUIRED_OPENCL=3.9.0 LLVM_REQUIRED_R600=3.9.0 -LLVM_REQUIRED_RADEONSI=4.0.0 -LLVM_REQUIRED_RADV=4.0.0 +LLVM_REQUIRED_RADEONSI=5.0.0 +LLVM_REQUIRED_RADV=5.0.0 LLVM_REQUIRED_SWR=4.0.0 dnl Check for progs diff --git a/meson.build b/meson.build index 0f88ddfe8e7..d0cb8961638 100644 --- a/meson.build +++ b/meson.build @@ -1107,7 +1107,9 @@ if with_gallium_opencl # TODO: optional modules endif -if with_amd_vk or with_gallium_radeonsi or with_gallium_swr +if with_amd_vk or with_gallium_radeonsi + _llvm_version = '>= 5.0.0' +elif with_gallium_swr _llvm_version = '>= 4.0.0' elif with_gallium_opencl or with_gallium_r600 _llvm_version = '>= 3.9.0' diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c index 6f5f04496ee..36c1d62637b 100644 --- a/src/amd/common/ac_llvm_build.c +++ b/src/amd/common/ac_llvm_build.c @@ -888,127 +888,91 @@ ac_build_buffer_store_dword(struct ac_llvm_context *ctx, bool writeonly_memory, bool swizzle_enable_hint) { - static unsigned dfmt[] = { - V_008F0C_BUF_DATA_FORMAT_32, - V_008F0C_BUF_DATA_FORMAT_32_32, - V_008F0C_BUF_DATA_FORMAT_32_32_32, - V_008F0C_BUF_DATA_FORMAT_32_32_32_32 - }; + /* Split 3 channel stores, becase LLVM doesn't support 3-channel + * intrinsics. */ + if (num_channels == 3) { + LLVMValueRef v[3], v01; + + for (int i = 0; i < 3; i++) { + v[i] = LLVMBuildExtractElement(ctx->builder, vdata, + LLVMConstInt(ctx->i32, i, 0), ""); + } + v01 = ac_build_gather_values(ctx, v, 2); + + ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset, + soffset, inst_offset, glc, slc, + writeonly_memory, swizzle_enable_hint); + ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset, + soffset, inst_offset + 8, + glc, slc, + writeonly_memory, swizzle_enable_hint); + return; + } /* SWIZZLE_ENABLE requires that soffset isn't folded into voffset * (voffset is swizzled, but soffset isn't swizzled). * llvm.amdgcn.buffer.store doesn't have a separate soffset parameter. */ - if (!swizzle_enable_hint || HAVE_LLVM >= 0x0500) { - /* Split 3 channel stores, becase LLVM doesn't support 3-channel - * intrinsics. */ - if (num_channels == 3) { - LLVMValueRef v[3], v01; - - for (int i = 0; i < 3; i++) { - v[i] = LLVMBuildExtractElement(ctx->builder, vdata, - LLVMConstInt(ctx->i32, i, 0), ""); - } - v01 = ac_build_gather_values(ctx, v, 2); - - ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset, - soffset, inst_offset, glc, slc, - writeonly_memory, swizzle_enable_hint); - ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset, - soffset, inst_offset + 8, - glc, slc, - writeonly_memory, swizzle_enable_hint); - return; - } + if (!swizzle_enable_hint) { + LLVMValueRef offset = soffset; + + static const char *types[] = {"f32", "v2f32", "v4f32"}; + + if (inst_offset) + offset = LLVMBuildAdd(ctx->builder, offset, + LLVMConstInt(ctx->i32, inst_offset, 0), ""); + if (voffset) + offset = LLVMBuildAdd(ctx->builder, offset, voffset, ""); + + LLVMValueRef args[] = { + ac_to_float(ctx, vdata), + LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""), + LLVMConstInt(ctx->i32, 0, 0), + offset, + LLVMConstInt(ctx->i1, glc, 0), + LLVMConstInt(ctx->i1, slc, 0), + }; - unsigned func = CLAMP(num_channels, 1, 3) - 1; char name[256]; - - if (!swizzle_enable_hint) { - LLVMValueRef offset = soffset; - - static const char *types[] = {"f32", "v2f32", "v4f32"}; - - if (inst_offset) - offset = LLVMBuildAdd(ctx->builder, offset, - LLVMConstInt(ctx->i32, inst_offset, 0), ""); - if (voffset) - offset = LLVMBuildAdd(ctx->builder, offset, voffset, ""); - - LLVMValueRef args[] = { - ac_to_float(ctx, vdata), - LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""), - LLVMConstInt(ctx->i32, 0, 0), - offset, - LLVMConstInt(ctx->i1, glc, 0), - LLVMConstInt(ctx->i1, slc, 0), - }; - - snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s", - types[func]); - - ac_build_intrinsic(ctx, name, ctx->voidt, - args, ARRAY_SIZE(args), - writeonly_memory ? - AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY : - AC_FUNC_ATTR_WRITEONLY); - return; - } else { - static const char *types[] = {"i32", "v2i32", "v4i32"}; - LLVMValueRef args[] = { - vdata, - LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""), - LLVMConstInt(ctx->i32, 0, 0), - voffset ? voffset : LLVMConstInt(ctx->i32, 0, 0), - soffset, - LLVMConstInt(ctx->i32, inst_offset, 0), - LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0), - LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0), - LLVMConstInt(ctx->i1, glc, 0), - LLVMConstInt(ctx->i1, slc, 0), - }; - snprintf(name, sizeof(name), "llvm.amdgcn.tbuffer.store.%s", - types[func]); - - ac_build_intrinsic(ctx, name, ctx->voidt, - args, ARRAY_SIZE(args), - writeonly_memory ? - AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY : - AC_FUNC_ATTR_WRITEONLY); - return; - } + snprintf(name, sizeof(name), "llvm.amdgcn.buffer.store.%s", + types[CLAMP(num_channels, 1, 3) - 1]); + + ac_build_intrinsic(ctx, name, ctx->voidt, + args, ARRAY_SIZE(args), + writeonly_memory ? + AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY : + AC_FUNC_ATTR_WRITEONLY); + return; } - assert(num_channels >= 1 && num_channels <= 4); - + static const unsigned dfmt[] = { + V_008F0C_BUF_DATA_FORMAT_32, + V_008F0C_BUF_DATA_FORMAT_32_32, + V_008F0C_BUF_DATA_FORMAT_32_32_32, + V_008F0C_BUF_DATA_FORMAT_32_32_32_32 + }; + static const char *types[] = {"i32", "v2i32", "v4i32"}; LLVMValueRef args[] = { - rsrc, vdata, - LLVMConstInt(ctx->i32, num_channels, 0), - voffset ? voffset : LLVMGetUndef(ctx->i32), + LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, ""), + LLVMConstInt(ctx->i32, 0, 0), + voffset ? voffset : LLVMConstInt(ctx->i32, 0, 0), soffset, LLVMConstInt(ctx->i32, inst_offset, 0), LLVMConstInt(ctx->i32, dfmt[num_channels - 1], 0), LLVMConstInt(ctx->i32, V_008F0C_BUF_NUM_FORMAT_UINT, 0), - LLVMConstInt(ctx->i32, voffset != NULL, 0), - LLVMConstInt(ctx->i32, 0, 0), /* idxen */ - LLVMConstInt(ctx->i32, glc, 0), - LLVMConstInt(ctx->i32, slc, 0), - LLVMConstInt(ctx->i32, 0, 0), /* tfe*/ + LLVMConstInt(ctx->i1, glc, 0), + LLVMConstInt(ctx->i1, slc, 0), }; - - /* The instruction offset field has 12 bits */ - assert(voffset || inst_offset < (1 << 12)); - - /* The intrinsic is overloaded, we need to add a type suffix for overloading to work. */ - unsigned func = CLAMP(num_channels, 1, 3) - 1; - const char *types[] = {"i32", "v2i32", "v4i32"}; char name[256]; - snprintf(name, sizeof(name), "llvm.SI.tbuffer.store.%s", types[func]); + snprintf(name, sizeof(name), "llvm.amdgcn.tbuffer.store.%s", + types[CLAMP(num_channels, 1, 3) - 1]); ac_build_intrinsic(ctx, name, ctx->voidt, args, ARRAY_SIZE(args), - AC_FUNC_ATTR_LEGACY); + writeonly_memory ? + AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY : + AC_FUNC_ATTR_WRITEONLY); } static LLVMValueRef @@ -1402,66 +1366,41 @@ LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a, LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value) { - if (HAVE_LLVM >= 0x0500) { - return ac_build_fmin(ctx, ac_build_fmax(ctx, value, ctx->f32_0), - ctx->f32_1); - } - - LLVMValueRef args[3] = { - value, - LLVMConstReal(ctx->f32, 0), - LLVMConstReal(ctx->f32, 1), - }; - - return ac_build_intrinsic(ctx, "llvm.AMDGPU.clamp.", ctx->f32, args, 3, - AC_FUNC_ATTR_READNONE | - AC_FUNC_ATTR_LEGACY); + return ac_build_fmin(ctx, ac_build_fmax(ctx, value, ctx->f32_0), + ctx->f32_1); } void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a) { LLVMValueRef args[9]; - if (HAVE_LLVM >= 0x0500) { - args[0] = LLVMConstInt(ctx->i32, a->target, 0); - args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0); + args[0] = LLVMConstInt(ctx->i32, a->target, 0); + args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0); - if (a->compr) { - LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context); - LLVMTypeRef v2i16 = LLVMVectorType(i16, 2); + if (a->compr) { + LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context); + LLVMTypeRef v2i16 = LLVMVectorType(i16, 2); - args[2] = LLVMBuildBitCast(ctx->builder, a->out[0], - v2i16, ""); - args[3] = LLVMBuildBitCast(ctx->builder, a->out[1], - v2i16, ""); - args[4] = LLVMConstInt(ctx->i1, a->done, 0); - args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0); - - ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16", - ctx->voidt, args, 6, 0); - } else { - args[2] = a->out[0]; - args[3] = a->out[1]; - args[4] = a->out[2]; - args[5] = a->out[3]; - args[6] = LLVMConstInt(ctx->i1, a->done, 0); - args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0); - - ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32", - ctx->voidt, args, 8, 0); - } - return; - } + args[2] = LLVMBuildBitCast(ctx->builder, a->out[0], + v2i16, ""); + args[3] = LLVMBuildBitCast(ctx->builder, a->out[1], + v2i16, ""); + args[4] = LLVMConstInt(ctx->i1, a->done, 0); + args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0); - args[0] = LLVMConstInt(ctx->i32, a->enabled_channels, 0); - args[1] = LLVMConstInt(ctx->i32, a->valid_mask, 0); - args[2] = LLVMConstInt(ctx->i32, a->done, 0); - args[3] = LLVMConstInt(ctx->i32, a->target, 0); - args[4] = LLVMConstInt(ctx->i32, a->compr, 0); - memcpy(args + 5, a->out, sizeof(a->out[0]) * 4); + ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16", + ctx->voidt, args, 6, 0); + } else { + args[2] = a->out[0]; + args[3] = a->out[1]; + args[4] = a->out[2]; + args[5] = a->out[3]; + args[6] = LLVMConstInt(ctx->i1, a->done, 0); + args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0); - ac_build_intrinsic(ctx, "llvm.SI.export", ctx->voidt, args, 9, - AC_FUNC_ATTR_LEGACY); + ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32", + ctx->voidt, args, 8, 0); + } } void ac_build_export_null(struct ac_llvm_context *ctx) @@ -1708,19 +1647,13 @@ LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx, LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx, LLVMValueRef args[2]) { - if (HAVE_LLVM >= 0x0500) { - LLVMTypeRef v2f16 = - LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2); - LLVMValueRef res = - ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz", - v2f16, args, 2, - AC_FUNC_ATTR_READNONE); - return LLVMBuildBitCast(ctx->builder, res, ctx->i32, ""); - } - - return ac_build_intrinsic(ctx, "llvm.SI.packf16", ctx->i32, args, 2, - AC_FUNC_ATTR_READNONE | - AC_FUNC_ATTR_LEGACY); + LLVMTypeRef v2f16 = + LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2); + LLVMValueRef res = + ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz", + v2f16, args, 2, + AC_FUNC_ATTR_READNONE); + return LLVMBuildBitCast(ctx->builder, res, ctx->i32, ""); } /* Upper 16 bits must be zero. */ @@ -1904,20 +1837,11 @@ LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input, width, }; - if (HAVE_LLVM >= 0x0500) { - return ac_build_intrinsic(ctx, - is_signed ? "llvm.amdgcn.sbfe.i32" : - "llvm.amdgcn.ubfe.i32", - ctx->i32, args, 3, - AC_FUNC_ATTR_READNONE); - } - return ac_build_intrinsic(ctx, - is_signed ? "llvm.AMDGPU.bfe.i32" : - "llvm.AMDGPU.bfe.u32", + is_signed ? "llvm.amdgcn.sbfe.i32" : + "llvm.amdgcn.ubfe.i32", ctx->i32, args, 3, - AC_FUNC_ATTR_READNONE | - AC_FUNC_ATTR_LEGACY); + AC_FUNC_ATTR_READNONE); } void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned simm16) @@ -1997,9 +1921,9 @@ LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0, return val; } -#define AC_EXP_TARGET (HAVE_LLVM >= 0x0500 ? 0 : 3) -#define AC_EXP_ENABLED_CHANNELS (HAVE_LLVM >= 0x0500 ? 1 : 0) -#define AC_EXP_OUT0 (HAVE_LLVM >= 0x0500 ? 2 : 5) +#define AC_EXP_TARGET 0 +#define AC_EXP_ENABLED_CHANNELS 1 +#define AC_EXP_OUT0 2 enum ac_ir_type { AC_IR_UNDEF, diff --git a/src/amd/common/ac_llvm_helper.cpp b/src/amd/common/ac_llvm_helper.cpp index 1d2369baa73..1a2aee3bc9a 100644 --- a/src/amd/common/ac_llvm_helper.cpp +++ b/src/amd/common/ac_llvm_helper.cpp @@ -37,22 +37,10 @@ #include #include -#if HAVE_LLVM < 0x0500 -namespace llvm { -typedef AttributeSet AttributeList; -} -#endif - void ac_add_attr_dereferenceable(LLVMValueRef val, uint64_t bytes) { llvm::Argument *A = llvm::unwrap(val); -#if HAVE_LLVM < 0x0500 - llvm::AttrBuilder B; - B.addDereferenceableAttr(bytes); - A->addAttr(llvm::AttributeList::get(A->getContext(), A->getArgNo() + 1, B)); -#else A->addAttr(llvm::Attribute::getWithDereferenceableBytes(A->getContext(), bytes)); -#endif } bool ac_is_sgpr_param(LLVMValueRef arg) diff --git a/src/amd/vulkan/radv_debug.c b/src/amd/vulkan/radv_debug.c index 368bc4b5d05..e55489d71d1 100644 --- a/src/amd/vulkan/radv_debug.c +++ b/src/amd/vulkan/radv_debug.c @@ -643,11 +643,9 @@ radv_dump_device_name(struct radv_device *device, FILE *f) snprintf(kernel_version, sizeof(kernel_version), " / %s", uname_data.release); - if (HAVE_LLVM > 0) { - snprintf(llvm_string, sizeof(llvm_string), - ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff, - HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); - } + snprintf(llvm_string, sizeof(llvm_string), + ", LLVM %i.%i.%i", (HAVE_LLVM >> 8) & 0xff, + HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); fprintf(f, "Device name: %s (%s DRM %i.%i.%i%s%s)\n\n", chip_name, device->physical_device->name, diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c index 778887bd580..51b44cc2227 100644 --- a/src/amd/vulkan/radv_device.c +++ b/src/amd/vulkan/radv_device.c @@ -108,12 +108,9 @@ radv_get_device_name(enum radeon_family family, char *name, size_t name_len) default: chip_string = "AMD RADV unknown"; break; } - if (HAVE_LLVM > 0) { - snprintf(llvm_string, sizeof(llvm_string), - " (LLVM %i.%i.%i)", (HAVE_LLVM >> 8) & 0xff, - HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); - } - + snprintf(llvm_string, sizeof(llvm_string), + " (LLVM %i.%i.%i)", (HAVE_LLVM >> 8) & 0xff, + HAVE_LLVM & 0xff, MESA_LLVM_VERSION_PATCH); snprintf(name, name_len, "%s%s", chip_string, llvm_string); } diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c index dba615025da..1384bf0bdba 100644 --- a/src/amd/vulkan/radv_nir_to_llvm.c +++ b/src/amd/vulkan/radv_nir_to_llvm.c @@ -851,7 +851,7 @@ static void set_llvm_calling_convention(LLVMValueRef func, calling_conv = RADEON_LLVM_AMDGPU_GS; break; case MESA_SHADER_TESS_CTRL: - calling_conv = HAVE_LLVM >= 0x0500 ? RADEON_LLVM_AMDGPU_HS : RADEON_LLVM_AMDGPU_VS; + calling_conv = RADEON_LLVM_AMDGPU_HS; break; case MESA_SHADER_FRAGMENT: calling_conv = RADEON_LLVM_AMDGPU_PS; diff --git a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c index 42e83f14829..9706c04e8cd 100644 --- a/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c +++ b/src/amd/vulkan/winsys/amdgpu/radv_amdgpu_winsys.c @@ -45,13 +45,6 @@ do_winsys_init(struct radv_amdgpu_winsys *ws, int fd) if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo)) return false; - /* LLVM 5.0 is required for GFX9. */ - if (ws->info.chip_class >= GFX9 && HAVE_LLVM < 0x0500) { - fprintf(stderr, "amdgpu: LLVM 5.0 is required, got LLVM %i.%i\n", - HAVE_LLVM >> 8, HAVE_LLVM & 255); - return false; - } - ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, &ws->info.max_alignment); if (!ws->addrlib) { fprintf(stderr, "amdgpu: Cannot create addrlib.\n"); diff --git a/src/gallium/drivers/radeonsi/si_get.c b/src/gallium/drivers/radeonsi/si_get.c index 757192f309c..5379ba9ade5 100644 --- a/src/gallium/drivers/radeonsi/si_get.c +++ b/src/gallium/drivers/radeonsi/si_get.c @@ -183,13 +183,11 @@ static int si_get_param(struct pipe_screen *pscreen, enum pipe_cap param) case PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION: case PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS: case PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET: + case PIPE_CAP_TGSI_BALLOT: case PIPE_CAP_TGSI_VOTE: case PIPE_CAP_TGSI_FS_FBFETCH: return 1; - case PIPE_CAP_TGSI_BALLOT: - return HAVE_LLVM >= 0x0500; - case PIPE_CAP_RESOURCE_FROM_USER_MEMORY: return !SI_BIG_ENDIAN && sscreen->info.has_userptr; diff --git a/src/gallium/drivers/radeonsi/si_pipe.c b/src/gallium/drivers/radeonsi/si_pipe.c index fe0a20ba6cd..cc871b1cc9f 100644 --- a/src/gallium/drivers/radeonsi/si_pipe.c +++ b/src/gallium/drivers/radeonsi/si_pipe.c @@ -164,7 +164,7 @@ static void si_destroy_compiler(struct si_compiler *compiler) LLVMDisposeMessage((char*)compiler->data_layout); if (compiler->passmgr) LLVMDisposePassManager(compiler->passmgr); -#if HAVE_LLVM < 0x0500 || HAVE_LLVM >= 0x0700 +#if HAVE_LLVM >= 0x0700 /* This crashes on LLVM 5.0 and 6.0 and Ubuntu 18.04, so leak it there. */ if (compiler->target_library_info) gallivm_dispose_target_library_info(compiler->target_library_info); diff --git a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c index a4c2a1f27ab..43bc97006c2 100644 --- a/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c +++ b/src/gallium/drivers/radeonsi/si_shader_tgsi_setup.c @@ -1181,8 +1181,7 @@ void si_llvm_create_func(struct si_shader_context *ctx, call_conv = RADEON_LLVM_AMDGPU_VS; break; case PIPE_SHADER_TESS_CTRL: - call_conv = HAVE_LLVM >= 0x0500 ? RADEON_LLVM_AMDGPU_HS : - RADEON_LLVM_AMDGPU_VS; + call_conv = RADEON_LLVM_AMDGPU_HS; break; case PIPE_SHADER_GEOMETRY: call_conv = RADEON_LLVM_AMDGPU_GS; diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c index 84d8ca6fcf3..caa799195fb 100644 --- a/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c +++ b/src/gallium/winsys/amdgpu/drm/amdgpu_winsys.c @@ -53,13 +53,6 @@ static bool do_winsys_init(struct amdgpu_winsys *ws, int fd) if (!ac_query_gpu_info(fd, ws->dev, &ws->info, &ws->amdinfo)) goto fail; - /* LLVM 5.0 is required for GFX9. */ - if (ws->info.chip_class >= GFX9 && HAVE_LLVM < 0x0500) { - fprintf(stderr, "amdgpu: LLVM 5.0 is required, got LLVM %i.%i\n", - HAVE_LLVM >> 8, HAVE_LLVM & 255); - goto fail; - } - ws->addrlib = amdgpu_addr_create(&ws->info, &ws->amdinfo, &ws->info.max_alignment); if (!ws->addrlib) { fprintf(stderr, "amdgpu: Cannot create addrlib.\n"); -- 2.30.2