From fa407198c7394251fa41d12f7da86f0d78f0d880 Mon Sep 17 00:00:00 2001 From: lkcl Date: Tue, 10 May 2022 12:49:13 +0100 Subject: [PATCH] --- openpower/sv/SimpleV_rationale.mdwn | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn index 00b20219e..09fa46293 100644 --- a/openpower/sv/SimpleV_rationale.mdwn +++ b/openpower/sv/SimpleV_rationale.mdwn @@ -871,7 +871,8 @@ Let us also imagine that the Matrices are stored in Memory with PEs attached, and that the PEs are fully functioning Power ISA with Draft SVP64, but their Multiply capability is not as good as the main CPU. Therefore: -we want the PEs to feed the sparse data to the main CPU, a la "Extra-V". +we want the PEs to conditionally +feed sparse data to the main CPU, a la "Extra-V". * The ZOLC SVREMAP System running on the main CPU generates a Matrix Memory-Load Schedule. -- 2.30.2