From fa52aeb3964e38b8e7b9e34c427fa1b5a42f358f Mon Sep 17 00:00:00 2001
From: Tom Stellard <thomas.stellard@amd.com>
Date: Tue, 28 Feb 2012 17:32:28 -0500
Subject: [PATCH] r600/llvm: Add LOAD_VTX instruction

---
 src/gallium/drivers/radeon/R600Instructions.td | 13 +++++++++++++
 1 file changed, 13 insertions(+)

diff --git a/src/gallium/drivers/radeon/R600Instructions.td b/src/gallium/drivers/radeon/R600Instructions.td
index 913e27f1f9c..af6b8be5190 100644
--- a/src/gallium/drivers/radeon/R600Instructions.td
+++ b/src/gallium/drivers/radeon/R600Instructions.td
@@ -918,6 +918,19 @@ def LOCAL_SIZE_Z : R600PreloadInst <"LOCAL_SIZE_Z",
 
 
 
+let isPseudo = 1 in {
+
+def LOAD_VTX : AMDGPUShaderInst <
+    (outs R600_Reg32:$dst),
+    (ins MEMri:$mem),
+    "LOAD_VTX",
+    [(set (i32 R600_Reg32:$dst), (load_param ADDRParam:$mem))]
+>;
+
+
+} //End isPseudo
+
+
 include "R600ShaderPatterns.td"
 
 // We need this pattern to avoid having real registers in PHI nodes.
-- 
2.30.2