From fa6d6e36707ce6df85cd3cc5e4065dca1aa3613b Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sat, 7 May 2022 17:43:38 +0100
Subject: [PATCH]

---
 openpower/sv/SimpleV_rationale.mdwn | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/openpower/sv/SimpleV_rationale.mdwn b/openpower/sv/SimpleV_rationale.mdwn
index b6ee4150d..bd7a8df2f 100644
--- a/openpower/sv/SimpleV_rationale.mdwn
+++ b/openpower/sv/SimpleV_rationale.mdwn
@@ -332,7 +332,7 @@ Sum)
   early-exit from Arithmetic operation looping?"
 * over 500 Branch-Conditional Modes emerge from application of
   Boolean Logic in a Vector context, on top of an already-powerful
-  Scalar Branch-Conditional instruction.
+  Scalar Branch-Conditional/Counter instruction
 
 **What is missing from Power Scalar ISA that a Vector ISA needs?**
 
-- 
2.30.2