From faffd7f7a48e5b41cc96c13c33889117298042e6 Mon Sep 17 00:00:00 2001 From: lkcl Date: Mon, 18 Jan 2021 13:59:42 +0000 Subject: [PATCH] --- openpower/sv/cr_int_predication.mdwn | 2 ++ 1 file changed, 2 insertions(+) diff --git a/openpower/sv/cr_int_predication.mdwn b/openpower/sv/cr_int_predication.mdwn index 83b7d453c..f53415341 100644 --- a/openpower/sv/cr_int_predication.mdwn +++ b/openpower/sv/cr_int_predication.mdwn @@ -15,6 +15,8 @@ Condition Registers are conceptually perfect for use as predicate masks, the onl With the scalar OpenPOWER v3.0B ISA having already popcnt, cntlz and others normally seen in Vector Mask operations it makes sense to allow *both* scalar integers *and* CR-Vectors to be predicate masks. That in turn means that much more comprehensive interaction between CRs and scalar Integers is required. +The opportunity is therefore taken to also augment CR logical arithmetic as well, using a mask-based paradigm that takes into consideration multiple bits of each CR (eq/lt/gt/ov). v3.0B Scalar CR instructions (crand, crxor) only allow a single bit calculation. + Basic concept: * CR-based instructions that perform simple AND/OR/XOR from all four bits -- 2.30.2