From fb15a1e9dda17b1006274cdeb1c1410c3f8df0bf Mon Sep 17 00:00:00 2001 From: Dave Airlie Date: Thu, 16 Feb 2017 03:43:29 +0000 Subject: [PATCH] radv/ac: use shader imsb emission code. Reviewed-by: Edward O'Callaghan Signed-off-by: Dave Airlie --- src/amd/common/ac_nir_to_llvm.c | 18 +----------------- 1 file changed, 1 insertion(+), 17 deletions(-) diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c index 883656d5cec..d3c02ceb4a4 100644 --- a/src/amd/common/ac_nir_to_llvm.c +++ b/src/amd/common/ac_nir_to_llvm.c @@ -930,23 +930,7 @@ static LLVMValueRef emit_find_lsb(struct nir_to_llvm_context *ctx, static LLVMValueRef emit_ifind_msb(struct nir_to_llvm_context *ctx, LLVMValueRef src0) { - LLVMValueRef msb = ac_emit_llvm_intrinsic(&ctx->ac, "llvm.AMDGPU.flbit.i32", - ctx->i32, &src0, 1, - AC_FUNC_ATTR_READNONE); - - /* The HW returns the last bit index from MSB, but NIR wants - * the index from LSB. Invert it by doing "31 - msb". */ - msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false), - msb, ""); - - LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true); - LLVMValueRef cond = LLVMBuildOr(ctx->builder, - LLVMBuildICmp(ctx->builder, LLVMIntEQ, - src0, ctx->i32zero, ""), - LLVMBuildICmp(ctx->builder, LLVMIntEQ, - src0, all_ones, ""), ""); - - return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, ""); + return ac_emit_imsb(&ctx->ac, src0, ctx->i32); } static LLVMValueRef emit_ufind_msb(struct nir_to_llvm_context *ctx, -- 2.30.2