From fb4de1eb29cf5373d5408deff3b24d13a81a9cb7 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 23 Apr 2018 07:29:28 +0100 Subject: [PATCH] add implementation paradigms --- simple_v_extension.mdwn | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/simple_v_extension.mdwn b/simple_v_extension.mdwn index a5bf63d0a..669eb6b3b 100644 --- a/simple_v_extension.mdwn +++ b/simple_v_extension.mdwn @@ -1586,8 +1586,15 @@ discussion then led to the question of OoO architectures ## Implementation Paradigms -TODO: assess various implementation paradigms: - +TODO: assess various implementation paradigms. These are listed roughly +in order of simplicity (minimum compliance, for ultra-light-weight +embedded systems or to reduce design complexity and the burden of +design implementation and compliance, in non-critical areas), right the +way to high-performance systems. + +* Full (or partial) software-emulated (via traps): full support for CSRs + required, however when a register is used that is detected (in hardware) + to be vectorised, an exception is thrown. * Single-issue In-order, reduced pipeline depth (traditional SIMD / DSP) * In-order 5+ stage pipelines with instruction FIFOs and mild register-renaming * Out-of-order with instruction FIFOs and aggressive register-renaming -- 2.30.2