From fbaca0bd15320df88f3dcae81c0da02d50aa2b4d Mon Sep 17 00:00:00 2001
From: lkcl <lkcl@web>
Date: Sun, 26 Mar 2023 11:41:15 +0100
Subject: [PATCH]

---
 openpower/sv/rfc/ls008.mdwn | 7 +++++--
 1 file changed, 5 insertions(+), 2 deletions(-)

diff --git a/openpower/sv/rfc/ls008.mdwn b/openpower/sv/rfc/ls008.mdwn
index b398656ff..4f29019a6 100644
--- a/openpower/sv/rfc/ls008.mdwn
+++ b/openpower/sv/rfc/ls008.mdwn
@@ -109,16 +109,15 @@ Pseudo-code:
         SVSTATE[54] <- SVi[6]
         RT <- [0]*62 || SVSTATE[53:54]
     else
+        # Vertical-First explicit stepping.
         step <- SVSTATE_NEXT(SVi, vf)
         RT <- [0]*57 || step
-
 ```
 
 Special Registers Altered:
 
     CR0                     (if Rc=1)
 
-
 -------------
 
 \newpage{}
@@ -128,6 +127,10 @@ Special Registers Altered:
 
 SVL-Form
 
+| 0-5|6-10|11-15|16-22 | 23 24 25 | 26-30 |31|   FORM   |
+| -- | -- | --- | ---- |----------| ----- |--|----------|
+|PO  | RT | RA  | SVi  | ms vs vf | XO    |Rc| SVL-Form |
+
 * setvl RT,RA,SVi,vf,vs,ms (Rc=0)
 * setvl. RT,RA,SVi,vf,vs,ms (Rc=1)
 
-- 
2.30.2