From fbb91719681147c9107fb7136950635cba23858a Mon Sep 17 00:00:00 2001 From: Jason Ekstrand Date: Tue, 28 Feb 2017 18:48:58 -0800 Subject: [PATCH] i965: Move image uniform setup to brw_nir_uniforms.cpp It's the only thing that's using it. Reviewed-by: Kenneth Graunke --- .../drivers/dri/i965/brw_nir_uniforms.cpp | 51 +++++++++++++++++++ src/mesa/drivers/dri/i965/brw_shader.cpp | 51 ------------------- 2 files changed, 51 insertions(+), 51 deletions(-) diff --git a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp index 447998bbe22..9ebd7d83d6c 100644 --- a/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp +++ b/src/mesa/drivers/dri/i965/brw_nir_uniforms.cpp @@ -66,6 +66,57 @@ brw_nir_setup_glsl_builtin_uniform(nir_variable *var, } } +static void +setup_vec4_uniform_value(const gl_constant_value **params, + const gl_constant_value *values, + unsigned n) +{ + static const gl_constant_value zero = { 0 }; + + for (unsigned i = 0; i < n; ++i) + params[i] = &values[i]; + + for (unsigned i = n; i < 4; ++i) + params[i] = &zero; +} + +void +brw_setup_image_uniform_values(gl_shader_stage stage, + struct brw_stage_prog_data *stage_prog_data, + unsigned param_start_index, + const gl_uniform_storage *storage) +{ + const gl_constant_value **param = + &stage_prog_data->param[param_start_index]; + + for (unsigned i = 0; i < MAX2(storage->array_elements, 1); i++) { + const unsigned image_idx = storage->opaque[stage].index + i; + const brw_image_param *image_param = + &stage_prog_data->image_param[image_idx]; + + /* Upload the brw_image_param structure. The order is expected to match + * the BRW_IMAGE_PARAM_*_OFFSET defines. + */ + setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET, + (const gl_constant_value *)&image_param->surface_idx, 1); + setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_OFFSET_OFFSET, + (const gl_constant_value *)image_param->offset, 2); + setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SIZE_OFFSET, + (const gl_constant_value *)image_param->size, 3); + setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_STRIDE_OFFSET, + (const gl_constant_value *)image_param->stride, 4); + setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_TILING_OFFSET, + (const gl_constant_value *)image_param->tiling, 3); + setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SWIZZLING_OFFSET, + (const gl_constant_value *)image_param->swizzling, 2); + param += BRW_IMAGE_PARAM_SIZE; + + brw_mark_surface_used( + stage_prog_data, + stage_prog_data->binding_table.image_start + image_idx); + } +} + static void brw_nir_setup_glsl_uniform(gl_shader_stage stage, nir_variable *var, const struct gl_program *prog, diff --git a/src/mesa/drivers/dri/i965/brw_shader.cpp b/src/mesa/drivers/dri/i965/brw_shader.cpp index 47ea9c10a6d..28ed8dc37e8 100644 --- a/src/mesa/drivers/dri/i965/brw_shader.cpp +++ b/src/mesa/drivers/dri/i965/brw_shader.cpp @@ -1137,57 +1137,6 @@ backend_shader::calculate_cfg() cfg = new(mem_ctx) cfg_t(&this->instructions); } -static void -setup_vec4_uniform_value(const gl_constant_value **params, - const gl_constant_value *values, - unsigned n) -{ - static const gl_constant_value zero = { 0 }; - - for (unsigned i = 0; i < n; ++i) - params[i] = &values[i]; - - for (unsigned i = n; i < 4; ++i) - params[i] = &zero; -} - -void -brw_setup_image_uniform_values(gl_shader_stage stage, - struct brw_stage_prog_data *stage_prog_data, - unsigned param_start_index, - const gl_uniform_storage *storage) -{ - const gl_constant_value **param = - &stage_prog_data->param[param_start_index]; - - for (unsigned i = 0; i < MAX2(storage->array_elements, 1); i++) { - const unsigned image_idx = storage->opaque[stage].index + i; - const brw_image_param *image_param = - &stage_prog_data->image_param[image_idx]; - - /* Upload the brw_image_param structure. The order is expected to match - * the BRW_IMAGE_PARAM_*_OFFSET defines. - */ - setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SURFACE_IDX_OFFSET, - (const gl_constant_value *)&image_param->surface_idx, 1); - setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_OFFSET_OFFSET, - (const gl_constant_value *)image_param->offset, 2); - setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SIZE_OFFSET, - (const gl_constant_value *)image_param->size, 3); - setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_STRIDE_OFFSET, - (const gl_constant_value *)image_param->stride, 4); - setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_TILING_OFFSET, - (const gl_constant_value *)image_param->tiling, 3); - setup_vec4_uniform_value(param + BRW_IMAGE_PARAM_SWIZZLING_OFFSET, - (const gl_constant_value *)image_param->swizzling, 2); - param += BRW_IMAGE_PARAM_SIZE; - - brw_mark_surface_used( - stage_prog_data, - stage_prog_data->binding_table.image_start + image_idx); - } -} - /** * Decide which set of clip planes should be used when clipping via * gl_Position or gl_ClipVertex. -- 2.30.2