From fbce3cbb32c91e357c5ff5f0299184bc035e1525 Mon Sep 17 00:00:00 2001 From: Luke Kenneth Casson Leighton Date: Mon, 16 Nov 2020 15:35:48 +0000 Subject: [PATCH] note that mv is possible using addi. --- openpower/sv/16_bit_compressed.mdwn | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/openpower/sv/16_bit_compressed.mdwn b/openpower/sv/16_bit_compressed.mdwn index 545a705d0..a3ee7b227 100644 --- a/openpower/sv/16_bit_compressed.mdwn +++ b/openpower/sv/16_bit_compressed.mdwn @@ -115,8 +115,10 @@ Further Notes: * bc also has an immediate mode, listed below in Branch section * for LD/ST, offset is aligned. 8-byte: i2||imm||0b000 4-byte: 0b00 * SV Prefix over-rides help provide alternative bitwidths for LD/ST -* RB|0 if RB is zero, addi. becomes "li" (this only works if RT takes - part of opcode). +* RB|0 if RB is zero, addi. becomes "li" + - this only works if RT takes part of opcode + - mv is also possible by specifying an immediate of zero + ### Branch -- 2.30.2