From fbcf8a77a0f0a28a79a3f65aa60b91c740d21636 Mon Sep 17 00:00:00 2001 From: lkcl Date: Thu, 8 Sep 2022 23:35:28 +0100 Subject: [PATCH] --- openpower/sv/rfc/ls001.mdwn | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/openpower/sv/rfc/ls001.mdwn b/openpower/sv/rfc/ls001.mdwn index f196cfd00..b71453154 100644 --- a/openpower/sv/rfc/ls001.mdwn +++ b/openpower/sv/rfc/ls001.mdwn @@ -29,7 +29,7 @@ add actual Vector Instructions, relying solely and exclusively on the **Scalar** ISA, it is **Scalar** instructions that need to be added to the **Scalar** Power ISA before Simple-V may orthogonally Vectorise them. -Therefore because the goal of RED Semiconductor Ltd, an OpenPOWER +The goal of RED Semiconductor Ltd, an OpenPOWER Stakeholder, is to bring to market mass-volume general-purpose compute processors that are competitive in the 3D GPU Audio Visual DSP EDGE IoT desktop chromebook netbook smartphone laptop markets, performance-leveraged -- 2.30.2